[PATCH] D22333: AMDGPU: Remove brev intrinsic
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 13 20:59:10 PDT 2016
arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm.
http://reviews.llvm.org/D22333
Files:
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
lib/Target/AMDGPU/AMDGPUIntrinsics.td
test/CodeGen/AMDGPU/bitreverse.ll
Index: test/CodeGen/AMDGPU/bitreverse.ll
===================================================================
--- test/CodeGen/AMDGPU/bitreverse.ll
+++ test/CodeGen/AMDGPU/bitreverse.ll
@@ -11,8 +11,6 @@
declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
-declare i32 @llvm.AMDGPU.brev(i32) #1
-
; FUNC-LABEL: {{^}}s_brev_i16:
; SI: s_brev_b32
define void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
@@ -103,13 +101,5 @@
ret void
}
-; FUNC-LABEL: {{^}}legacy_s_brev_i32:
-; SI: s_brev_b32
-define void @legacy_s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
- %brev = call i32 @llvm.AMDGPU.brev(i32 %val) #1
- store i32 %brev, i32 addrspace(1)* %out
- ret void
-}
-
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
Index: lib/Target/AMDGPU/AMDGPUIntrinsics.td
===================================================================
--- lib/Target/AMDGPU/AMDGPUIntrinsics.td
+++ lib/Target/AMDGPU/AMDGPUIntrinsics.td
@@ -30,9 +30,6 @@
[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]
>;
- // Deprecated in favor of llvm.bitreverse
- def int_AMDGPU_brev : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
-
// Deprecated in favor of llvm.amdgcn.s.barrier
def int_AMDGPU_barrier_local : Intrinsic<[], [], [IntrConvergent]>;
def int_AMDGPU_barrier_global : Intrinsic<[], [], [IntrConvergent]>;
Index: lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -937,9 +937,6 @@
Op.getOperand(1),
Op.getOperand(2),
Op.getOperand(3));
-
- case AMDGPUIntrinsic::AMDGPU_brev: // Legacy name
- return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1));
}
}
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