[llvm] r275348 - Add EnableIPRA to TargetOptions, and move the cl::opt -enable-ipra to TargetMachine.cpp
Mehdi Amini via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 13 16:39:46 PDT 2016
Author: mehdi_amini
Date: Wed Jul 13 18:39:46 2016
New Revision: 275348
URL: http://llvm.org/viewvc/llvm-project?rev=275348&view=rev
Log:
Add EnableIPRA to TargetOptions, and move the cl::opt -enable-ipra to TargetMachine.cpp
Avoid exposing a cl::opt in a public header and instead promote this
option in the API.
Alternatively, we could land the cl::opt in CommandFlags.h so that
it is available to every tool, but we would still have to find an
option for clang.
Modified:
llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
llvm/trunk/include/llvm/Target/TargetOptions.h
llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp
llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
llvm/trunk/lib/Target/TargetMachine.cpp
Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=275348&r1=275347&r2=275348&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
+++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Wed Jul 13 18:39:46 2016
@@ -16,11 +16,8 @@
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/CommandLine.h"
#include <string>
-extern llvm::cl::opt<bool> UseIPRA;
-
namespace llvm {
class PassConfigImpl;
Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=275348&r1=275347&r2=275348&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
+++ llvm/trunk/include/llvm/Target/TargetOptions.h Wed Jul 13 18:39:46 2016
@@ -100,7 +100,8 @@ namespace llvm {
DisableIntegratedAS(false), CompressDebugSections(false),
RelaxELFRelocations(false), FunctionSections(false),
DataSections(false), UniqueSectionNames(true), TrapUnreachable(false),
- EmulatedTLS(false), FloatABIType(FloatABI::Default),
+ EmulatedTLS(false), EnableIPRA(false),
+ FloatABIType(FloatABI::Default),
AllowFPOpFusion(FPOpFusion::Standard), Reciprocals(TargetRecip()),
JTType(JumpTable::Single), ThreadModel(ThreadModel::POSIX),
EABIVersion(EABI::Default), DebuggerTuning(DebuggerKind::Default),
@@ -207,6 +208,9 @@ namespace llvm {
/// function in the runtime library..
unsigned EmulatedTLS : 1;
+ /// This flag enables InterProcedural Register Allocation (IPRA).
+ unsigned EnableIPRA : 1;
+
/// FloatABIType - This setting is set by -float-abi=xxx option is specfied
/// on the command line. This setting may either be Default, Soft, or Hard.
/// Default selects the target's default behavior. Soft selects the ABI for
Modified: llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp?rev=275348&r1=275347&r2=275348&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp Wed Jul 13 18:39:46 2016
@@ -69,7 +69,7 @@ void TargetFrameLowering::determineCalle
// When interprocedural register allocation is enabled caller saved registers
// are preferred over callee saved registers.
- if (UseIPRA && isSafeForNoCSROpt(MF.getFunction()))
+ if (MF.getTarget().Options.EnableIPRA && isSafeForNoCSROpt(MF.getFunction()))
return;
// Get the callee saved register list...
Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=275348&r1=275347&r2=275348&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Wed Jul 13 18:39:46 2016
@@ -124,10 +124,6 @@ static cl::opt<CFLAAType> UseCFLAA(
"Enable both variants of CFL-AA"),
clEnumValEnd));
-cl::opt<bool> UseIPRA("enable-ipra", cl::init(false), cl::Hidden,
- cl::desc("Enable interprocedural register allocation "
- "to reduce load/store at procedure calls."));
-
/// Allow standard passes to be disabled by command line options. This supports
/// simple binary flags that either suppress the pass or do nothing.
/// i.e. -disable-mypass=false has no effect.
@@ -522,7 +518,7 @@ void TargetPassConfig::addISelPrepare()
addPreISel();
// Force codegen to run according to the callgraph.
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
addPass(new DummyCGSCCPass);
// Add both the safe stack and the stack protection passes: each of them will
@@ -561,7 +557,7 @@ void TargetPassConfig::addISelPrepare()
void TargetPassConfig::addMachinePasses() {
AddingMachinePasses = true;
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
addPass(createRegUsageInfoPropPass());
// Insert a machine instr printer pass after the specified pass.
@@ -649,7 +645,7 @@ void TargetPassConfig::addMachinePasses(
addPreEmitPass();
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
// Collect register usage information and produce a register mask of
// clobbered registers, to be used to optimize call sites.
addPass(createRegUsageInfoCollector());
Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=275348&r1=275347&r2=275348&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Wed Jul 13 18:39:46 2016
@@ -31,6 +31,10 @@
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
+cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
+ cl::desc("Enable interprocedural register allocation "
+ "to reduce load/store at procedure calls."));
+
//---------------------------------------------------------------------------
// TargetMachine Class
//
@@ -40,7 +44,10 @@ TargetMachine::TargetMachine(const Targe
const TargetOptions &Options)
: TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
- RequireStructuredCFG(false), Options(Options) {}
+ RequireStructuredCFG(false), Options(Options) {
+ if (EnableIPRA.getNumOccurrences())
+ this->Options.EnableIPRA = EnableIPRA;
+}
TargetMachine::~TargetMachine() {
delete AsmInfo;
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