[PATCH] D22318: [MI] Fix MachineInstr::isInvariantLoad.

Justin Lebar via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 13 15:33:36 PDT 2016


jlebar created this revision.
jlebar added a reviewer: jfb.
jlebar added a subscriber: llvm-commits.
Herald added a subscriber: aemerson.

Previously it would say we had an invariant load if any of the memory
operands were invariant.  But the load should be invariant only if *all*
the memory operands are invariant.

No testcase because this has proven to be very difficult to tickle in
practice.  As just one example, ARM's ldrd instruction, which loads 64
bits into two 32-bit regs, is theoretically affected by this.  But when
it's produced, it loses its memoperands' invariance bits!

http://reviews.llvm.org/D22318

Files:
  lib/CodeGen/MachineInstr.cpp

Index: lib/CodeGen/MachineInstr.cpp
===================================================================
--- lib/CodeGen/MachineInstr.cpp
+++ lib/CodeGen/MachineInstr.cpp
@@ -1586,8 +1586,7 @@
        E = memoperands_end(); I != E; ++I) {
     if ((*I)->isVolatile()) return false;
     if ((*I)->isStore()) return false;
-    if ((*I)->isInvariant()) return true;
-
+    if ((*I)->isInvariant()) continue;
 
     // A load from a constant PseudoSourceValue is invariant.
     if (const PseudoSourceValue *PSV = (*I)->getPseudoValue())


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