[PATCH] D19825: Power9 - Add exploitation of vector load and store that do not require swaps

[Nemanja Ivanovic via llvm-commits]

nemanjai added inline comments.

================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:1009
@@ -1006,2 +1008,3 @@
   } else if (PPC::VSRCRegClass.hasSubClassEq(RC)) {
-    NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STXVD2X))
+    unsigned Op = Subtarget.isISA3_0() ? PPC::STXVX : PPC::STXVD2X;
+    NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(Op))
----------------
echristo wrote:
> ... including here I imagine.
I prefer to leave this query as-is because I don't think we would gain anything by emitting PPC::STXVD2X on a big endian Power9 either.


Repository:
  rL LLVM

http://reviews.llvm.org/D19825