[llvm] r275204 - X86FixupBWInsts: No need for forward liveness analysis.

[Matthias Braun via llvm-commits]

Author: matze
Date: Tue Jul 12 14:04:30 2016
New Revision: 275204

URL: http://llvm.org/viewvc/llvm-project?rev=275204&view=rev
Log:
X86FixupBWInsts: No need for forward liveness analysis.

With r274952 and r275201 in place there are no cases left where a
forward liveness analysis yields different results than a backward one.
So we can remove the forward stepping logic.

Differential Revision: http://reviews.llvm.org/D22083

Removed:
    llvm/trunk/test/CodeGen/X86/fixup-bw-inst-fwlive.mir
Modified:
    llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp

Modified: llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp?rev=275204&r1=275203&r2=275204&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp Tue Jul 12 14:04:30 2016
@@ -342,7 +342,6 @@ void FixupBWInstPass::processBasicBlock(
   // We run after PEI, so we need to AddPristinesAndCSRs.
   LiveRegs.addLiveOuts(MBB);
 
-  bool CandidateDidntGetTransformed = false;
   bool WasCandidate = false;
 
   for (auto I = MBB.rbegin(); I != MBB.rend(); ++I) {
@@ -354,46 +353,12 @@ void FixupBWInstPass::processBasicBlock(
     // nullptr.  We will revisit that in a bit.
     if (WasCandidate) {
       MIReplacements.push_back(std::make_pair(MI, NewMI));
-      if (!NewMI)
-        CandidateDidntGetTransformed = true;
     }
 
     // We're done with this instruction, update liveness for the next one.
     LiveRegs.stepBackward(*MI);
   }
 
-  if (CandidateDidntGetTransformed) {
-    // If there was a candidate that didn't get transformed then let's try
-    // doing the register liveness going forward.  Sometimes one direction
-    // is overly conservative compared to the other.
-    // FIXME - Register liveness should be investigated further. This really
-    // shouldn't be necessary.  See PR28142.
-    LiveRegs.clear();
-    LiveRegs.addLiveIns(MBB);
-
-    auto NextCandidateIter = MIReplacements.begin();
-    auto EndCandidateIter = MIReplacements.end();
-
-    for (auto I = MBB.begin(); I != MBB.end(); ++I) {
-      MachineInstr *MI = &*I;
-      SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
-      LiveRegs.stepForward(*MI, Clobbers);
-
-      if (NextCandidateIter == EndCandidateIter)
-        break;
-
-      // Only check and create a new instruction if this instruction is
-      // known to be a candidate that didn't get transformed.
-      if (NextCandidateIter->first == MI) {
-        if (NextCandidateIter->second == nullptr) {
-          MachineInstr *NewMI = tryReplaceInstr(MI, MBB, WasCandidate);
-          NextCandidateIter->second = NewMI;
-        }
-        ++NextCandidateIter;
-      }
-    }
-  }
-
   while (!MIReplacements.empty()) {
     MachineInstr *MI = MIReplacements.back().first;
     MachineInstr *NewMI = MIReplacements.back().second;

Removed: llvm/trunk/test/CodeGen/X86/fixup-bw-inst-fwlive.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fixup-bw-inst-fwlive.mir?rev=275203&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-bw-inst-fwlive.mir (original)
+++ llvm/trunk/test/CodeGen/X86/fixup-bw-inst-fwlive.mir (removed)
@@ -1,37 +0,0 @@
-# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o /dev/null %s 2>&1 | FileCheck %s
-
-# Verify that the forwards live-ness checking code in fixup-bw-inst works.
-
---- |
-  target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-
-  define i8 @foo(i8 %p1) {
-  entry:
-    %t1 = or i8 %p1, 0
-    br label %false
-  false:
-    ret i8 %t1
-  }
-
-...
-
----
-name:            foo
-allVRegsAllocated: true
-isSSA:           false
-tracksRegLiveness: true
-liveins:
-  - { reg: '%edi' }
-body:             |
-  bb.0.entry:
-    liveins: %edi
-    successors: %bb.1.false
-    
-    %al = MOV8rr %dil, implicit %edi
-    ; CHECK: %eax = MOV32rr undef %edi, implicit %dil
-
-  bb.1.false:
-    liveins: %al, %ax, %eax, %rax
-    RETQ %al
-
-...