[llvm] r275188 - auto-generate checks

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 12 09:21:56 PDT 2016


Author: spatel
Date: Tue Jul 12 11:21:55 2016
New Revision: 275188

URL: http://llvm.org/viewvc/llvm-project?rev=275188&view=rev
Log:
auto-generate checks

Modified:
    llvm/trunk/test/Transforms/InstCombine/zext.ll

Modified: llvm/trunk/test/Transforms/InstCombine/zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/zext.ll?rev=275188&r1=275187&r2=275188&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/zext.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/zext.ll Tue Jul 12 11:21:55 2016
@@ -1,45 +1,48 @@
-; Tests to make sure elimination of casts is working correctly
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 define i64 @test_sext_zext(i16 %A) {
-        %c1 = zext i16 %A to i32                ; <i32> [#uses=1]
-        %c2 = sext i32 %c1 to i64               ; <i64> [#uses=1]
-        ret i64 %c2
-
-; CHECK-LABEL: @test_sext_zext
-; CHECK-NOT: %c1
-; CHECK: %c2 = zext i16 %A to i64
-; CHECK: ret i64 %c2
+; CHECK-LABEL: @test_sext_zext(
+; CHECK-NEXT:    [[C2:%.*]] = zext i16 %A to i64
+; CHECK-NEXT:    ret i64 [[C2]]
+;
+  %c1 = zext i16 %A to i32
+  %c2 = sext i32 %c1 to i64
+  ret i64 %c2
 }
 
 define <2 x i64> @test2(<2 x i1> %A) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> %A to <2 x i64>
+; CHECK-NEXT:    [[ZEXT:%.*]] = xor <2 x i64> [[TMP1]], <i64 1, i64 1>
+; CHECK-NEXT:    ret <2 x i64> [[ZEXT]]
+;
   %xor = xor <2 x i1> %A, <i1 true, i1 true>
   %zext = zext <2 x i1> %xor to <2 x i64>
   ret <2 x i64> %zext
-
-; CHECK-LABEL: @test2
-; CHECK-NEXT: zext <2 x i1> %A to <2 x i64>
-; CHECK-NEXT: xor <2 x i64> %1, <i64 1, i64 1>
 }
 
 define <2 x i64> @test3(<2 x i64> %A) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[AND:%.*]] = and <2 x i64> %A, <i64 23, i64 42>
+; CHECK-NEXT:    ret <2 x i64> [[AND]]
+;
   %trunc = trunc <2 x i64> %A to <2 x i32>
   %and = and <2 x i32> %trunc, <i32 23, i32 42>
   %zext = zext <2 x i32> %and to <2 x i64>
   ret <2 x i64> %zext
-
-; CHECK-LABEL: @test3
-; CHECK-NEXT: and <2 x i64> %A, <i64 23, i64 42>
 }
 
 define <2 x i64> @test4(<2 x i64> %A) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
+; CHECK-NEXT:    [[XOR:%.*]] = and <2 x i64> [[TMP1]], <i64 23, i64 42>
+; CHECK-NEXT:    ret <2 x i64> [[XOR]]
+;
   %trunc = trunc <2 x i64> %A to <2 x i32>
   %and = and <2 x i32> %trunc, <i32 23, i32 42>
   %xor = xor <2 x i32> %and, <i32 23, i32 42>
   %zext = zext <2 x i32> %xor to <2 x i64>
   ret <2 x i64> %zext
-
-; CHECK-LABEL: @test4
-; CHECK-NEXT: xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
-; CHECK-NEXT: and <2 x i64> %1, <i64 23, i64 42>
 }
+




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