[PATCH] D22267: [AArch64] Properly validate the reciprocal estimation
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 12 09:17:48 PDT 2016
t.p.northover added a comment.
> Would concocting the bytecode using such data type be a sensible test?
That's definitely a valid way to write the test if you can get it to crash like that. We should be accepting and legalizing all IR.
> On another note, as I'm not very familiar with the latest versions of ARMv8, should FP16 be considered here?
Yes. f16, v4f16 and v8f16 are valid for both if `Subtarget->hasFullFP16()`.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4579
@@ -4575,3 +4578,3 @@
if (!Recips.isEnabled(RecipOp))
- return SDValue();
+ return (SDValue());
----------------
Why the extra brackets?
Repository:
rL LLVM
http://reviews.llvm.org/D22267
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