[llvm] r274829 - Bug 28444: Fix assertion when extract_vector_elt has mismatched type

[Mikael Holmén via llvm-commits]

Hi again,

Just realized you had already fixed this on trunk Matt :)

Thanks,
Mikael

On 07/12/2016 08:57 AM, Mikael Holmén via llvm-commits wrote:
> Hi Matt and Hal,
>
> On 07/08/2016 09:05 AM, Matt Arsenault via llvm-commits wrote:
>> Author: arsenm
>> Date: Fri Jul  8 02:05:00 2016
>> New Revision: 274829
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=274829&view=rev
>> Log:
>> Bug 28444: Fix assertion when extract_vector_elt has mismatched type
>>
>> For some reason extract_vector_elt is sometimes allowed to have
>> a different result type than the vector element type.
>>
>> Added:
>>      llvm/trunk/test/CodeGen/X86/pr28444.ll
>> Modified:
>>      llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=274829&r1=274828&r2=274829&view=diff
>>
>> ==============================================================================
>>
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Jul  8
>> 02:05:00 2016
>> @@ -12408,7 +12408,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR
>>     // on the constant elements already work.
>>     if (InVec.getOpcode() == ISD::INSERT_VECTOR_ELT &&
>>         EltNo == InVec.getOperand(2))
>> -    return InVec.getOperand(1);
>> +    return DAG.getAnyExtOrTrunc(InVec.getOperand(1), SDLoc(N), NVT);
>
> Getting a trunc will fail in case NVT isn't an integer.
>
> On my target I see this for the following code:
>
> define void @autogen_SD11193(i16) {
> BB:
>    br label %CF248
>
> CF248:                                            ; preds = %CF248, %BB
>    %Cmp143 = icmp uge i1 undef, undef
>    %I178 = insertelement <4 x float> undef, float undef, i32 0
>    %Sl192 = select i1 %Cmp143, <4 x float> %I178, <4 x float> undef
>    %Cmp193 = icmp ult i16 -17157, %0
>    br i1 %Cmp193, label %CF248, label %CF255
>
> CF255:                                            ; preds = %CF248
>    %I229 = insertelement <4 x float> %Sl192, float 0xBB38ECDCC0000000,
> i32 1
>    ret void
> }
>
> Both INSERT_VECTOR_ELT and EXTRACT_VECTOR_ELT on v4f32 are legal on my
> target and
>
>    // extract_vector_elt (insert_vector_elt vec, val, idx), idx) -> val
>    //
>    // This only really matters if the index is non-constant since other
> combines
>    // on the constant elements already work.
>    if (InVec.getOpcode() == ISD::INSERT_VECTOR_ELT &&
>        EltNo == InVec.getOperand(2))
>      return DAG.getAnyExtOrTrunc(InVec.getOperand(1), SDLoc(N), NVT);
>
> triggers but then an assert hits in getNode since VT isn't integer but
> rather f32:
>
> 3156      case ISD::TRUNCATE:
> 3157        assert(VT.isInteger() && Operand.getValueType().isInteger() &&
> 3158               "Invalid TRUNCATE!");
>
> Regards,
> Mikael
>
>>
>>     // Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) ->
>> EXTRACT_VECTOR_ELT.
>>     // We only perform this optimization before the op legalization
>> phase because
>>
>> Added: llvm/trunk/test/CodeGen/X86/pr28444.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28444.ll?rev=274829&view=auto
>>
>> ==============================================================================
>>
>> --- llvm/trunk/test/CodeGen/X86/pr28444.ll (added)
>> +++ llvm/trunk/test/CodeGen/X86/pr28444.ll Fri Jul  8 02:05:00 2016
>> @@ -0,0 +1,27 @@
>> +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 < %s |
>> FileCheck %s
>> +; https://llvm.org/bugs/show_bug.cgi?id=28444
>> +
>> +; extract_vector_elt is allowed to have a different result type than
>> +; the vector scalar type.
>> +; This uses both
>> +;  i8 = extract_vector_elt v1i1, Constant:i64<0>
>> +;  i1 = extract_vector_elt v1i1, Constant:i64<0>
>> +
>> +
>> +; CHECK-LABEL: {{^}}extractelt_mismatch_vector_element_type:
>> +; CHECK: movb $1, %al
>> +; CHECK: movb %al
>> +; CHECK: movb %al
>> +define void @extractelt_mismatch_vector_element_type(i32 %arg) {
>> +bb:
>> +  %tmp = icmp ult i32 %arg, 0
>> +  %tmp2 = insertelement <1 x i1> undef, i1 true, i32 0
>> +  %tmp3 = select i1 %tmp, <1 x i1> undef, <1 x i1> %tmp2
>> +  %tmp6 = extractelement <1 x i1> %tmp3, i32 0
>> +  br label %bb1
>> +
>> +bb1:
>> +  store volatile <1 x i1> %tmp3, <1 x i1>* undef
>> +  store volatile i1 %tmp6, i1* undef
>> +  ret void
>> +}
>>
>>
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