[PATCH] D22256: [AArch64] Set FMOVS0 and FMOVD0 as isAsCheapAsAMove when needed.

Haicheng Wu via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 11 21:39:41 PDT 2016


haicheng created this revision.
haicheng added reviewers: MatzeB, mcrosier, mssimpso.
haicheng added subscribers: t.p.northover, llvm-commits.
haicheng set the repository for this revision to rL LLVM.
Herald added subscribers: mcrosier, rengolin, aemerson.

If a subtarget has both ZCZeroing and CustomCheapAsMoveHandling features (now only Kryo has both), set FMOVS0 and FMOVD0 isAsCheapAsAMove.

Repository:
  rL LLVM

http://reviews.llvm.org/D22256

Files:
  lib/Target/AArch64/AArch64InstrInfo.cpp
  test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

Index: test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
===================================================================
--- test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
+++ test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
@@ -13,9 +13,9 @@
 ; CYCLONE: movi.2d v2, #0000000000000000
 ; CYCLONE: movi.2d v3, #0000000000000000
 ; KRYO: movi v0.2d, #0000000000000000
-; KRYO: mov v1.16b, v0.16b 
-; KRYO: mov v2.16b, v0.16b 
-; KRYO: mov v3.16b, v0.16b
+; KRYO: movi v1.2d, #0000000000000000
+; KRYO: movi v2.2d, #0000000000000000
+; KRYO: movi v3.2d, #0000000000000000
   tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
   ret void
 }
@@ -46,7 +46,7 @@
 ; CYCLONE: movi.2d v0, #0000000000000000
 ; CYCLONE: movi.2d v1, #0000000000000000
 ; KRYO: movi v0.2d, #0000000000000000
-; KRYO: mov v1.16b, v0.16b
+; KRYO: movi v1.2d, #0000000000000000
   tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
   ret void
 }
Index: lib/Target/AArch64/AArch64InstrInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64InstrInfo.cpp
+++ lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -620,6 +620,12 @@
     return canBeExpandedToORR(MI, 32);
   case AArch64::MOVi64imm:
     return canBeExpandedToORR(MI, 64);
+
+  // It is cheap to move #0 to float registers if the subtarget has 
+  // ZeroCycleZeroing feature.
+  case AArch64::FMOVS0:
+  case AArch64::FMOVD0:
+    return Subtarget.hasZeroCycleZeroing();
   }
 
   llvm_unreachable("Unknown opcode to check as cheap as a move!");


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