[llvm] r275101 - fix documentation comments; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 11 13:50:40 PDT 2016
Author: spatel
Date: Mon Jul 11 15:50:39 2016
New Revision: 275101
URL: http://llvm.org/viewvc/llvm-project?rev=275101&view=rev
Log:
fix documentation comments; NFC
Modified:
llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=275101&r1=275100&r2=275101&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Mon Jul 11 15:50:39 2016
@@ -878,56 +878,52 @@ namespace ISD {
SETCC_INVALID // Marker value.
};
- /// isSignedIntSetCC - Return true if this is a setcc instruction that
- /// performs a signed comparison when used with integer operands.
+ /// Return true if this is a setcc instruction that performs a signed
+ /// comparison when used with integer operands.
inline bool isSignedIntSetCC(CondCode Code) {
return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
}
- /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
- /// performs an unsigned comparison when used with integer operands.
+ /// Return true if this is a setcc instruction that performs an unsigned
+ /// comparison when used with integer operands.
inline bool isUnsignedIntSetCC(CondCode Code) {
return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
}
- /// isTrueWhenEqual - Return true if the specified condition returns true if
- /// the two operands to the condition are equal. Note that if one of the two
- /// operands is a NaN, this value is meaningless.
+ /// Return true if the specified condition returns true if the two operands to
+ /// the condition are equal. Note that if one of the two operands is a NaN,
+ /// this value is meaningless.
inline bool isTrueWhenEqual(CondCode Cond) {
return ((int)Cond & 1) != 0;
}
- /// getUnorderedFlavor - This function returns 0 if the condition is always
- /// false if an operand is a NaN, 1 if the condition is always true if the
- /// operand is a NaN, and 2 if the condition is undefined if the operand is a
- /// NaN.
+ /// This function returns 0 if the condition is always false if an operand is
+ /// a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if
+ /// the condition is undefined if the operand is a NaN.
inline unsigned getUnorderedFlavor(CondCode Cond) {
return ((int)Cond >> 3) & 3;
}
- /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
- /// 'op' is a valid SetCC operation.
+ /// Return the operation corresponding to !(X op Y), where 'op' is a valid
+ /// SetCC operation.
CondCode getSetCCInverse(CondCode Operation, bool isInteger);
- /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
- /// when given the operation for (X op Y).
+ /// Return the operation corresponding to (Y op X) when given the operation
+ /// for (X op Y).
CondCode getSetCCSwappedOperands(CondCode Operation);
- /// getSetCCOrOperation - Return the result of a logical OR between different
- /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
- /// function returns SETCC_INVALID if it is not possible to represent the
- /// resultant comparison.
+ /// Return the result of a logical OR between different comparisons of
+ /// identical values: ((X op1 Y) | (X op2 Y)). This function returns
+ /// SETCC_INVALID if it is not possible to represent the resultant comparison.
CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
- /// getSetCCAndOperation - Return the result of a logical AND between
- /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
- /// function returns SETCC_INVALID if it is not possible to represent the
- /// resultant comparison.
+ /// Return the result of a logical AND between different comparisons of
+ /// identical values: ((X op1 Y) & (X op2 Y)). This function returns
+ /// SETCC_INVALID if it is not possible to represent the resultant comparison.
CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
//===--------------------------------------------------------------------===//
- /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
- /// supports.
+ /// This enum defines the various converts CONVERT_RNDSAT supports.
enum CvtCode {
CVT_FF, /// Float from Float
CVT_FS, /// Float from Signed
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=275101&r1=275100&r2=275101&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Mon Jul 11 15:50:39 2016
@@ -1235,13 +1235,12 @@ public:
void dump() const;
- /// Create a stack temporary, suitable for holding the
- /// specified value type. If minAlign is specified, the slot size will have
- /// at least that alignment.
+ /// Create a stack temporary, suitable for holding the specified value type.
+ /// If minAlign is specified, the slot size will have at least that alignment.
SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1);
- /// Create a stack temporary suitable for holding
- /// either of the specified value types.
+ /// Create a stack temporary suitable for holding either of the specified
+ /// value types.
SDValue CreateStackTemporary(EVT VT1, EVT VT2);
SDValue FoldSymbolOffset(unsigned Opcode, EVT VT,
@@ -1285,27 +1284,27 @@ public:
/// is set.
bool isKnownToBeAPowerOfTwo(SDValue Val) const;
- /// Return the number of times the sign bit of the
- /// register is replicated into the other bits. We know that at least 1 bit
- /// is always equal to the sign bit (itself), but other cases can give us
- /// information. For example, immediately after an "SRA X, 2", we know that
- /// the top 3 bits are all equal to each other, so we return 3. Targets can
- /// implement the ComputeNumSignBitsForTarget method in the TargetLowering
- /// class to allow target nodes to be understood.
+ /// Return the number of times the sign bit of the register is replicated into
+ /// the other bits. We know that at least 1 bit is always equal to the sign
+ /// bit (itself), but other cases can give us information. For example,
+ /// immediately after an "SRA X, 2", we know that the top 3 bits are all equal
+ /// to each other, so we return 3. Targets can implement the
+ /// ComputeNumSignBitsForTarget method in the TargetLowering class to allow
+ /// target nodes to be understood.
unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const;
- /// Return true if the specified operand is an
- /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
- /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
- /// semantics as an ADD. This handles the equivalence:
+ /// Return true if the specified operand is an ISD::ADD with a ConstantSDNode
+ /// on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that
+ /// is guaranteed to have the same semantics as an ADD. This handles the
+ /// equivalence:
/// X|Cst == X+Cst iff X&Cst = 0.
bool isBaseWithConstantOffset(SDValue Op) const;
/// Test whether the given SDValue is known to never be NaN.
bool isKnownNeverNaN(SDValue Op) const;
- /// Test whether the given SDValue is known to never be
- /// positive or negative Zero.
+ /// Test whether the given SDValue is known to never be positive or negative
+ /// zero.
bool isKnownNeverZero(SDValue Op) const;
/// Test whether two SDValues are known to compare equal. This
@@ -1364,6 +1363,7 @@ public:
void ExtractVectorElements(SDValue Op, SmallVectorImpl<SDValue> &Args,
unsigned Start = 0, unsigned Count = 0);
+ /// Compute the default alignment value for the given type.
unsigned getEVTAlignment(EVT MemoryVT) const;
/// Test whether the given value is a constant int or similar node.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=275101&r1=275100&r2=275101&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jul 11 15:50:39 2016
@@ -245,8 +245,6 @@ ISD::NodeType ISD::getExtForLoadExtType(
llvm_unreachable("Invalid LoadExtType");
}
-/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
-/// when given the operation for (X op Y).
ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
// To perform this operation, we just need to swap the L and G bits of the
// operation.
@@ -257,8 +255,6 @@ ISD::CondCode ISD::getSetCCSwappedOperan
(OldG << 2)); // New L bit.
}
-/// getSetCCInverse - Return the operation corresponding to !(X op Y), where
-/// 'op' is a valid SetCC operation.
ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
unsigned Operation = Op;
if (isInteger)
@@ -273,9 +269,9 @@ ISD::CondCode ISD::getSetCCInverse(ISD::
}
-/// isSignedOp - For an integer comparison, return 1 if the comparison is a
-/// signed operation and 2 if the result is an unsigned comparison. Return zero
-/// if the operation does not depend on the sign of the input (setne and seteq).
+/// For an integer comparison, return 1 if the comparison is a signed operation
+/// and 2 if the result is an unsigned comparison. Return zero if the operation
+/// does not depend on the sign of the input (setne and seteq).
static int isSignedOp(ISD::CondCode Opcode) {
switch (Opcode) {
default: llvm_unreachable("Illegal integer setcc operation!");
@@ -292,10 +288,6 @@ static int isSignedOp(ISD::CondCode Opco
}
}
-/// getSetCCOrOperation - Return the result of a logical OR between different
-/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
-/// returns SETCC_INVALID if it is not possible to represent the resultant
-/// comparison.
ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
bool isInteger) {
if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
@@ -316,10 +308,6 @@ ISD::CondCode ISD::getSetCCOrOperation(I
return ISD::CondCode(Op);
}
-/// getSetCCAndOperation - Return the result of a logical AND between different
-/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
-/// function returns zero if it is not possible to represent the resultant
-/// comparison.
ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
bool isInteger) {
if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
@@ -884,9 +872,6 @@ SDNode *SelectionDAG::FindModifiedNodeSl
return Node;
}
-/// getEVTAlignment - Compute the default alignment value for the
-/// given type.
-///
unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
Type *Ty = VT == MVT::iPTR ?
PointerType::get(Type::getInt8Ty(*getContext()), 0) :
@@ -1480,9 +1465,8 @@ SDValue SelectionDAG::getCondCode(ISD::C
return SDValue(CondCodeNodes[Cond], 0);
}
-// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
-// the shuffle mask M that point at N1 to point at N2, and indices that point
-// N2 to point at N1.
+/// Swaps the values of N1 and N2. Swaps all indices in the shuffle mask M that
+/// point at N1 to point at N2 and indices that point at N2 to point at N1.
static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) {
std::swap(N1, N2);
ShuffleVectorSDNode::commuteMask(M);
@@ -1737,7 +1721,6 @@ SDValue SelectionDAG::getEHLabel(const S
return SDValue(N, 0);
}
-
SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
int64_t Offset,
bool isTarget,
@@ -1777,7 +1760,6 @@ SDValue SelectionDAG::getSrcValue(const
return SDValue(N, 0);
}
-/// getMDNode - Return an MDNodeSDNode which holds an MDNode.
SDValue SelectionDAG::getMDNode(const MDNode *MD) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
@@ -1800,7 +1782,6 @@ SDValue SelectionDAG::getBitcast(EVT VT,
return getNode(ISD::BITCAST, SDLoc(V), VT, V);
}
-/// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
unsigned SrcAS, unsigned DestAS) {
SDValue Ops[] = {Ptr};
@@ -1883,8 +1864,6 @@ SDValue SelectionDAG::expandVACopy(SDNod
MachinePointerInfo(VD), false, false, 0);
}
-/// CreateStackTemporary - Create a stack temporary, suitable for holding the
-/// specified value type.
SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
unsigned ByteSize = VT.getStoreSize();
@@ -1896,8 +1875,6 @@ SDValue SelectionDAG::CreateStackTempora
return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
}
-/// CreateStackTemporary - Create a stack temporary suitable for holding
-/// either of the specified value types.
SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
Type *Ty1 = VT1.getTypeForEVT(*getContext());
@@ -2547,12 +2524,7 @@ bool SelectionDAG::isKnownToBeAPowerOfTw
(KnownOne.countPopulation() == 1);
}
-/// ComputeNumSignBits - Return the number of times the sign bit of the
-/// register is replicated into the other bits. We know that at least 1 bit
-/// is always equal to the sign bit (itself), but other cases can give us
-/// information. For example, immediately after an "SRA X, 2", we know that
-/// the top 3 bits are all equal to each other, so we return 3.
-unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
+unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
EVT VT = Op.getValueType();
assert(VT.isInteger() && "Invalid VT!");
unsigned VTBits = VT.getScalarType().getSizeInBits();
@@ -2802,11 +2774,6 @@ unsigned SelectionDAG::ComputeNumSignBit
return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
}
-/// isBaseWithConstantOffset - Return true if the specified operand is an
-/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
-/// ISD::OR with a ConstantSDNode that is guaranteed to have the same
-/// semantics as an ADD. This handles the equivalence:
-/// X|Cst == X+Cst iff X&Cst = 0.
bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
!isa<ConstantSDNode>(Op.getOperand(1)))
@@ -2820,7 +2787,6 @@ bool SelectionDAG::isBaseWithConstantOff
return true;
}
-
bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
// If we're told that NaNs won't happen, assume they won't.
if (getTarget().Options.NoNaNsFPMath)
@@ -2914,8 +2880,7 @@ static SDValue FoldCONCAT_VECTORS(const
return DAG.getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
}
-/// getNode - Gets or creates the specified node.
-///
+/// Gets or creates the specified node.
SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, getVTList(VT), None);
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