[llvm] r275099 - [X86] Disable FixupSetCC for CodeGenOpt::None

[Michael Kuperstein via llvm-commits]

Author: mkuper
Date: Mon Jul 11 15:40:44 2016
New Revision: 275099

URL: http://llvm.org/viewvc/llvm-project?rev=275099&view=rev
Log:
[X86] Disable FixupSetCC for CodeGenOpt::None

It is an optimization pass, and should not run at -O0. Especially since Fast RA
will not do the required register coalescing anyway, so it's a loss even from
the optimization standpoint.

This also works around (but doesn't quite fix) PR28489.

Added:
    llvm/trunk/test/CodeGen/X86/pr28489.ll
Modified:
    llvm/trunk/lib/Target/X86/X86TargetMachine.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=275099&r1=275098&r2=275099&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Jul 11 15:40:44 2016
@@ -304,10 +304,10 @@ bool X86PassConfig::addPreISel() {
 }
 
 void X86PassConfig::addPreRegAlloc() {
-  addPass(createX86FixupSetCC());
-
-  if (getOptLevel() != CodeGenOpt::None)
-    addPass(createX86OptimizeLEAs());
+  if (getOptLevel() != CodeGenOpt::None) {
+    addPass(createX86FixupSetCC());    
+    addPass(createX86OptimizeLEAs());    
+  }
 
   addPass(createX86CallFrameOptimization());
   addPass(createX86WinAllocaExpander());

Added: llvm/trunk/test/CodeGen/X86/pr28489.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28489.ll?rev=275099&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28489.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr28489.ll Mon Jul 11 15:40:44 2016
@@ -0,0 +1,15 @@
+; ; RUN: llc < %s -mtriple=i686-pc-linux -O0 | FileCheck %s
+declare void @g(i32, i1)
+
+;CHECK-LABEL: f:
+;CHECK: cmpxchg8b
+;CHECK: sete %cl
+;CHECK: movzbl %cl
+define void @f(i64* %arg, i64 %arg1) {
+entry:
+  %tmp5 = cmpxchg i64* %arg, i64 %arg1, i64 %arg1 seq_cst seq_cst
+  %tmp7 = extractvalue { i64, i1 } %tmp5, 1
+  %tmp9 = zext i1 %tmp7 to i32
+  call void @g(i32 %tmp9, i1 %tmp7)
+  ret void
+}