[PATCH] D22226: [AArch64][CodeGen] Peephole optimization of Cmp+Bcc sequences with unconditional branch

[Evgeny Astigeevich via llvm-commits]

eastig added a comment.

In http://reviews.llvm.org/D22226#480417, @jmolloy wrote:

> Hi Evgeny,
>
> I'm afraid I don't understand the transform from the description. This looks like a simple compare-with-zero pattern - how do we know which branch will be taken?
>
> James


'SUBS WZR, Wn, #0' always sets C to 1 because nothing is borrowed. So we can say where B.LO and B.HS will go: B.LO will fall through (C is not clear); B.HS will take its target (C is set).
IR, which corresponds this, looks like:

  %2 = icmp ult/uge i64 %1, 0
   br i1 %2, label %ret1, label %ret0

BTW it is not optimized in the middle-end. In the back-end the optimized sequence 'SUBS; Bcc' is a result of some other optimizations. In a test, we have seen this case, there is a sequence of pointer expressions and a comparison.


http://reviews.llvm.org/D22226