[llvm] r274953 - AMDGPU: Simplify isSchedulingBoundary
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 8 18:13:51 PDT 2016
Author: arsenm
Date: Fri Jul 8 20:13:51 2016
New Revision: 274953
URL: http://llvm.org/viewvc/llvm-project?rev=274953&view=rev
Log:
AMDGPU: Simplify isSchedulingBoundary
Modified:
llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp?rev=274953&r1=274952&r2=274953&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp Fri Jul 8 20:13:51 2016
@@ -1455,14 +1455,13 @@ MachineInstr *SIInstrInfo::convertToThre
bool SIInstrInfo::isSchedulingBoundary(const MachineInstr &MI,
const MachineBasicBlock *MBB,
const MachineFunction &MF) const {
+ // XXX - Do we want the SP check in the base implementation?
+
// Target-independent instructions do not have an implicit-use of EXEC, even
// when they operate on VGPRs. Treating EXEC modifications as scheduling
// boundaries prevents incorrect movements of such instructions.
- const SIRegisterInfo *TRI = MF.getSubtarget<SISubtarget>().getRegisterInfo();
- if (MI.modifiesRegister(AMDGPU::EXEC, TRI))
- return true;
-
- return AMDGPUInstrInfo::isSchedulingBoundary(MI, MBB, MF);
+ return TargetInstrInfo::isSchedulingBoundary(MI, MBB, MF) ||
+ MI.modifiesRegister(AMDGPU::EXEC, &RI);
}
bool SIInstrInfo::isInlineConstant(const APInt &Imm) const {
More information about the llvm-commits
mailing list