[llvm] r274912 - WebAssembly: Avoid implicit iterator conversions, NFC

Duncan P. N. Exon Smith via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 8 12:36:40 PDT 2016


Author: dexonsmith
Date: Fri Jul  8 14:36:40 2016
New Revision: 274912

URL: http://llvm.org/viewvc/llvm-project?rev=274912&view=rev
Log:
WebAssembly: Avoid implicit iterator conversions, NFC

Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the WebAssembly backend by preferring MachineInstr&
over MachineInstr*.

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp?rev=274912&r1=274911&r2=274912&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp Fri Jul  8 14:36:40 2016
@@ -65,8 +65,8 @@ FunctionPass *llvm::createWebAssemblyArg
 }
 
 /// Test whether the given instruction is an ARGUMENT.
-static bool IsArgument(const MachineInstr *MI) {
-  switch (MI->getOpcode()) {
+static bool IsArgument(const MachineInstr &MI) {
+  switch (MI.getOpcode()) {
   case WebAssembly::ARGUMENT_I32:
   case WebAssembly::ARGUMENT_I64:
   case WebAssembly::ARGUMENT_F32:
@@ -88,20 +88,18 @@ bool WebAssemblyArgumentMove::runOnMachi
   MachineBasicBlock::iterator InsertPt = EntryMBB.end();
 
   // Look for the first NonArg instruction.
-  for (auto MII = EntryMBB.begin(), MIE = EntryMBB.end(); MII != MIE; ++MII) {
-    MachineInstr *MI = MII;
+  for (MachineInstr &MI : EntryMBB) {
     if (!IsArgument(MI)) {
-      InsertPt = MII;
+      InsertPt = MI;
       break;
     }
   }
 
   // Now move any argument instructions later in the block
   // to before our first NonArg instruction.
-  for (auto I = InsertPt, E = EntryMBB.end(); I != E; ++I) {
-    MachineInstr *MI = I;
+  for (MachineInstr &MI : llvm::make_range(InsertPt, EntryMBB.end())) {
     if (IsArgument(MI)) {
-      EntryMBB.insert(InsertPt, MI->removeFromParent());
+      EntryMBB.insert(InsertPt, MI.removeFromParent());
       Changed = true;
     }
   }

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp?rev=274912&r1=274911&r2=274912&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp Fri Jul  8 14:36:40 2016
@@ -295,11 +295,11 @@ static bool ExplicitlyBranchesTo(Machine
 }
 
 /// Test whether MI is a child of some other node in an expression tree.
-static bool IsChild(const MachineInstr *MI,
+static bool IsChild(const MachineInstr &MI,
                     const WebAssemblyFunctionInfo &MFI) {
-  if (MI->getNumOperands() == 0)
+  if (MI.getNumOperands() == 0)
     return false;
-  const MachineOperand &MO = MI->getOperand(0);
+  const MachineOperand &MO = MI.getOperand(0);
   if (!MO.isReg() || MO.isImplicit() || !MO.isDef())
     return false;
   unsigned Reg = MO.getReg();
@@ -369,7 +369,7 @@ static void PlaceBlockMarker(MachineBasi
     // Otherwise, insert the BLOCK as late in Header as we can, but before the
     // beginning of the local expression tree and any nested BLOCKs.
     InsertPos = Header->getFirstTerminator();
-    while (InsertPos != Header->begin() && IsChild(prev(InsertPos), MFI) &&
+    while (InsertPos != Header->begin() && IsChild(*prev(InsertPos), MFI) &&
            prev(InsertPos)->getOpcode() != WebAssembly::LOOP &&
            prev(InsertPos)->getOpcode() != WebAssembly::END_BLOCK &&
            prev(InsertPos)->getOpcode() != WebAssembly::END_LOOP)

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp?rev=274912&r1=274911&r2=274912&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp Fri Jul  8 14:36:40 2016
@@ -89,13 +89,12 @@ static void ImposeStackOrdering(MachineI
 // Determine whether a call to the callee referenced by
 // MI->getOperand(CalleeOpNo) reads memory, writes memory, and/or has side
 // effects.
-static void QueryCallee(const MachineInstr *MI, unsigned CalleeOpNo,
-                        bool &Read, bool &Write, bool &Effects,
-                        bool &StackPointer) {
+static void QueryCallee(const MachineInstr &MI, unsigned CalleeOpNo, bool &Read,
+                        bool &Write, bool &Effects, bool &StackPointer) {
   // All calls can use the stack pointer.
   StackPointer = true;
 
-  const MachineOperand &MO = MI->getOperand(CalleeOpNo);
+  const MachineOperand &MO = MI.getOperand(CalleeOpNo);
   if (MO.isGlobal()) {
     const Constant *GV = MO.getGlobal();
     if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
@@ -122,24 +121,24 @@ static void QueryCallee(const MachineIns
 
 // Determine whether MI reads memory, writes memory, has side effects,
 // and/or uses the __stack_pointer value.
-static void Query(const MachineInstr *MI, AliasAnalysis &AA,
-                  bool &Read, bool &Write, bool &Effects, bool &StackPointer) {
-  assert(!MI->isPosition());
-  assert(!MI->isTerminator());
+static void Query(const MachineInstr &MI, AliasAnalysis &AA, bool &Read,
+                  bool &Write, bool &Effects, bool &StackPointer) {
+  assert(!MI.isPosition());
+  assert(!MI.isTerminator());
 
-  if (MI->isDebugValue())
+  if (MI.isDebugValue())
     return;
 
   // Check for loads.
-  if (MI->mayLoad() && !MI->isInvariantLoad(&AA))
+  if (MI.mayLoad() && !MI.isInvariantLoad(&AA))
     Read = true;
 
   // Check for stores.
-  if (MI->mayStore()) {
+  if (MI.mayStore()) {
     Write = true;
 
     // Check for stores to __stack_pointer.
-    for (auto MMO : MI->memoperands()) {
+    for (auto MMO : MI.memoperands()) {
       const MachinePointerInfo &MPI = MMO->getPointerInfo();
       if (MPI.V.is<const PseudoSourceValue *>()) {
         auto PSV = MPI.V.get<const PseudoSourceValue *>();
@@ -149,8 +148,8 @@ static void Query(const MachineInstr *MI
             StackPointer = true;
       }
     }
-  } else if (MI->hasOrderedMemoryRef()) {
-    switch (MI->getOpcode()) {
+  } else if (MI.hasOrderedMemoryRef()) {
+    switch (MI.getOpcode()) {
     case WebAssembly::DIV_S_I32: case WebAssembly::DIV_S_I64:
     case WebAssembly::REM_S_I32: case WebAssembly::REM_S_I64:
     case WebAssembly::DIV_U_I32: case WebAssembly::DIV_U_I64:
@@ -167,7 +166,7 @@ static void Query(const MachineInstr *MI
     default:
       // Record volatile accesses, unless it's a call, as calls are handled
       // specially below.
-      if (!MI->isCall()) {
+      if (!MI.isCall()) {
         Write = true;
         Effects = true;
       }
@@ -176,8 +175,8 @@ static void Query(const MachineInstr *MI
   }
 
   // Check for side effects.
-  if (MI->hasUnmodeledSideEffects()) {
-    switch (MI->getOpcode()) {
+  if (MI.hasUnmodeledSideEffects()) {
+    switch (MI.getOpcode()) {
     case WebAssembly::DIV_S_I32: case WebAssembly::DIV_S_I64:
     case WebAssembly::REM_S_I32: case WebAssembly::REM_S_I64:
     case WebAssembly::DIV_U_I32: case WebAssembly::DIV_U_I64:
@@ -198,8 +197,8 @@ static void Query(const MachineInstr *MI
   }
 
   // Analyze calls.
-  if (MI->isCall()) {
-    switch (MI->getOpcode()) {
+  if (MI.isCall()) {
+    switch (MI.getOpcode()) {
     case WebAssembly::CALL_VOID:
     case WebAssembly::CALL_INDIRECT_VOID:
       QueryCallee(MI, 0, Read, Write, Effects, StackPointer);
@@ -320,7 +319,7 @@ static bool IsSafeToMove(const MachineIn
   }
 
   bool Read = false, Write = false, Effects = false, StackPointer = false;
-  Query(Def, AA, Read, Write, Effects, StackPointer);
+  Query(*Def, AA, Read, Write, Effects, StackPointer);
 
   // If the instruction does not access memory and has no side effects, it has
   // no additional dependencies.
@@ -334,7 +333,7 @@ static bool IsSafeToMove(const MachineIn
     bool InterveningWrite = false;
     bool InterveningEffects = false;
     bool InterveningStackPointer = false;
-    Query(I, AA, InterveningRead, InterveningWrite, InterveningEffects,
+    Query(*I, AA, InterveningRead, InterveningWrite, InterveningEffects,
           InterveningStackPointer);
     if (Effects && InterveningEffects)
       return false;




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