[llvm] r274883 - [InstCombine] allow or(sext(A), B) --> A ? -1 : B transform for vectors
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 8 10:01:15 PDT 2016
Author: spatel
Date: Fri Jul 8 12:01:15 2016
New Revision: 274883
URL: http://llvm.org/viewvc/llvm-project?rev=274883&view=rev
Log:
[InstCombine] allow or(sext(A), B) --> A ? -1 : B transform for vectors
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/trunk/test/Transforms/InstCombine/or.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp?rev=274883&r1=274882&r2=274883&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp Fri Jul 8 12:01:15 2016
@@ -2393,11 +2393,12 @@ Instruction *InstCombiner::visitOr(Binar
if (Instruction *CastedOr = foldCastedBitwiseLogic(I))
return CastedOr;
- // or(sext(A), B) -> A ? -1 : B where A is an i1
- // or(A, sext(B)) -> B ? -1 : A where B is an i1
- if (match(Op0, m_SExt(m_Value(A))) && A->getType()->isIntegerTy(1))
+ // or(sext(A), B) / or(B, sext(A)) --> A ? -1 : B, where A is i1 or <N x i1>.
+ if (match(Op0, m_SExt(m_Value(A))) &&
+ A->getType()->getScalarType()->isIntegerTy(1))
return SelectInst::Create(A, ConstantInt::getSigned(I.getType(), -1), Op1);
- if (match(Op1, m_SExt(m_Value(A))) && A->getType()->isIntegerTy(1))
+ if (match(Op1, m_SExt(m_Value(A))) &&
+ A->getType()->getScalarType()->isIntegerTy(1))
return SelectInst::Create(A, ConstantInt::getSigned(I.getType(), -1), Op0);
// Note: If we've gotten to the point of visiting the outer OR, then the
Modified: llvm/trunk/test/Transforms/InstCombine/or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/or.ll?rev=274883&r1=274882&r2=274883&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/or.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/or.ll Fri Jul 8 12:01:15 2016
@@ -447,8 +447,7 @@ define i32 @orsext_to_sel_swap(i32 %x, i
define <2 x i32> @orsext_to_sel_vec(<2 x i32> %x, <2 x i1> %y) {
; CHECK-LABEL: @orsext_to_sel_vec(
-; CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> %y to <2 x i32>
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SEXT]], %x
+; CHECK-NEXT: [[OR:%.*]] = select <2 x i1> %y, <2 x i32> <i32 -1, i32 -1>, <2 x i32> %x
; CHECK-NEXT: ret <2 x i32> [[OR]]
;
%sext = sext <2 x i1> %y to <2 x i32>
@@ -458,8 +457,7 @@ define <2 x i32> @orsext_to_sel_vec(<2 x
define <2 x i132> @orsext_to_sel_vec_swap(<2 x i132> %x, <2 x i1> %y) {
; CHECK-LABEL: @orsext_to_sel_vec_swap(
-; CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> %y to <2 x i132>
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i132> [[SEXT]], %x
+; CHECK-NEXT: [[OR:%.*]] = select <2 x i1> %y, <2 x i132> <i132 -1, i132 -1>, <2 x i132> %x
; CHECK-NEXT: ret <2 x i132> [[OR]]
;
%sext = sext <2 x i1> %y to <2 x i132>
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