[PATCH] D20474: when calculating RegUsages, ignore instructions which are uniformed after vectorization

[Matthew Simpson via llvm-commits]

mssimpso added inline comments.

================
Comment at: test/Transforms/LoopVectorize/reverse_iter.ll:38-41
@@ -27,6 +37,6 @@
 ; <label>:3                                       ; preds = %.lr.ph, %3
   %indvars.iv = phi i64 [ %2, %.lr.ph ], [ %indvars.iv.next, %3 ]
   %sum.01 = phi i32 [ undef, %.lr.ph ], [ %9, %3 ]
   %4 = trunc i64 %indvars.iv to i32
   %5 = shl nsw i32 %4, 1
   %6 = sext i32 %5 to i64
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Hi Wei,

The change to this test doesn't look right to me. Since indvars.iv feeds into the shl, why is it added to VecValuesToIngore? The shift remains as vector computation. Am I missing something?


Repository:
  rL LLVM

http://reviews.llvm.org/D20474