[llvm] r274258 - Delete MCCodeGenInfo.

Martin Böhme via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 7 09:03:03 PDT 2016


It looks as if this creates a difference between stage 2 and 3 of a clang
bootstrap for us. Do you have any idea why that might be the case?

On 30 June 2016 at 20:25, Rafael Espindola via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: rafael
> Date: Thu Jun 30 13:25:11 2016
> New Revision: 274258
>
> URL: http://llvm.org/viewvc/llvm-project?rev=274258&view=rev
> Log:
> Delete MCCodeGenInfo.
>
> MC doesn't really care about CodeGen stuff, so this was just
> complicating target initialization.
>
> Removed:
>     llvm/trunk/include/llvm/MC/MCCodeGenInfo.h
>     llvm/trunk/lib/MC/MCCodeGenInfo.cpp
> Modified:
>     llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
>     llvm/trunk/include/llvm/Support/TargetRegistry.h
>     llvm/trunk/include/llvm/Target/TargetMachine.h
>     llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
>     llvm/trunk/lib/MC/CMakeLists.txt
>     llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
>     llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
>     llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
>     llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
>     llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
>     llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
>     llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
>     llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
>     llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
>     llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
>     llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
>     llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
>     llvm/trunk/lib/Target/TargetMachine.cpp
>
> llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
>     llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
>     llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
>
> Modified: llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h (original)
> +++ llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h Thu Jun 30
> 13:25:11 2016
> @@ -22,7 +22,6 @@
>  #include "llvm/IR/Module.h"
>  #include "llvm/IR/ValueHandle.h"
>  #include "llvm/IR/ValueMap.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/Object/Binary.h"
>  #include "llvm/Support/ErrorHandling.h"
>  #include "llvm/Support/Mutex.h"
>
> Removed: llvm/trunk/include/llvm/MC/MCCodeGenInfo.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCCodeGenInfo.h?rev=274257&view=auto
>
> ==============================================================================
> --- llvm/trunk/include/llvm/MC/MCCodeGenInfo.h (original)
> +++ llvm/trunk/include/llvm/MC/MCCodeGenInfo.h (removed)
> @@ -1,50 +0,0 @@
> -//===-- llvm/MC/MCCodeGenInfo.h - Target CodeGen Info -----------*- C++
> -*-===//
> -//
> -//                     The LLVM Compiler Infrastructure
> -//
> -// This file is distributed under the University of Illinois Open Source
> -// License. See LICENSE.TXT for details.
> -//
>
> -//===----------------------------------------------------------------------===//
> -//
> -// This file tracks information about the target which can affect codegen,
> -// asm parsing, and asm printing. For example, relocation model.
> -//
>
> -//===----------------------------------------------------------------------===//
> -
> -#ifndef LLVM_MC_MCCODEGENINFO_H
> -#define LLVM_MC_MCCODEGENINFO_H
> -
> -#include "llvm/Support/CodeGen.h"
> -
> -namespace llvm {
> -
> -class MCCodeGenInfo {
> -  /// Relocation model: static, pic, etc.
> -  ///
> -  Reloc::Model RelocationModel;
> -
> -  /// Code model.
> -  ///
> -  CodeModel::Model CMModel;
> -
> -  /// Optimization level.
> -  ///
> -  CodeGenOpt::Level OptLevel;
> -
> -public:
> -  void initMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM,
> -                         CodeGenOpt::Level OL);
> -
> -  Reloc::Model getRelocationModel() const { return RelocationModel; }
> -
> -  CodeModel::Model getCodeModel() const { return CMModel; }
> -
> -  CodeGenOpt::Level getOptLevel() const { return OptLevel; }
> -
> -  // Allow overriding OptLevel on a per-function basis.
> -  void setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; }
> -};
> -} // namespace llvm
> -
> -#endif
>
> Modified: llvm/trunk/include/llvm/Support/TargetRegistry.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetRegistry.h?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/TargetRegistry.h (original)
> +++ llvm/trunk/include/llvm/Support/TargetRegistry.h Thu Jun 30 13:25:11
> 2016
> @@ -34,7 +34,6 @@ class MCAsmBackend;
>  class MCAsmInfo;
>  class MCAsmParser;
>  class MCCodeEmitter;
> -class MCCodeGenInfo;
>  class MCContext;
>  class MCDisassembler;
>  class MCInstrAnalysis;
> @@ -93,10 +92,9 @@ public:
>
>    typedef MCAsmInfo *(*MCAsmInfoCtorFnTy)(const MCRegisterInfo &MRI,
>                                            const Triple &TT);
> -  typedef MCCodeGenInfo *(*MCCodeGenInfoCtorFnTy)(const Triple &TT,
> -                                                  Reloc::Model RM,
> -                                                  CodeModel::Model CM,
> -                                                  CodeGenOpt::Level OL);
> +  typedef void (*MCAdjustCodeGenOptsFnTy)(const Triple &TT, Reloc::Model
> RM,
> +                                          CodeModel::Model &CM);
> +
>    typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void);
>    typedef MCInstrAnalysis *(*MCInstrAnalysisCtorFnTy)(const MCInstrInfo
> *Info);
>    typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(const Triple &TT);
> @@ -178,9 +176,7 @@ private:
>    /// registered.
>    MCAsmInfoCtorFnTy MCAsmInfoCtorFn;
>
> -  /// MCCodeGenInfoCtorFn - Constructor function for this target's
> -  /// MCCodeGenInfo, if registered.
> -  MCCodeGenInfoCtorFnTy MCCodeGenInfoCtorFn;
> +  MCAdjustCodeGenOptsFnTy MCAdjustCodeGenOptsFn;
>
>    /// MCInstrInfoCtorFn - Constructor function for this target's
> MCInstrInfo,
>    /// if registered.
> @@ -301,14 +297,10 @@ public:
>      return MCAsmInfoCtorFn(MRI, Triple(TheTriple));
>    }
>
> -  /// createMCCodeGenInfo - Create a MCCodeGenInfo implementation.
> -  ///
> -  MCCodeGenInfo *createMCCodeGenInfo(StringRef TT, Reloc::Model RM,
> -                                     CodeModel::Model CM,
> -                                     CodeGenOpt::Level OL) const {
> -    if (!MCCodeGenInfoCtorFn)
> -      return nullptr;
> -    return MCCodeGenInfoCtorFn(Triple(TT), RM, CM, OL);
> +  void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                         CodeModel::Model &CM) const {
> +    if (MCAdjustCodeGenOptsFn)
> +      MCAdjustCodeGenOptsFn(TT, RM, CM);
>    }
>
>    /// createMCInstrInfo - Create a MCInstrInfo implementation.
> @@ -646,18 +638,9 @@ struct TargetRegistry {
>      T.MCAsmInfoCtorFn = Fn;
>    }
>
> -  /// RegisterMCCodeGenInfo - Register a MCCodeGenInfo implementation for
> the
> -  /// given target.
> -  ///
> -  /// Clients are responsible for ensuring that registration doesn't occur
> -  /// while another thread is attempting to access the registry. Typically
> -  /// this is done by initializing all targets at program startup.
> -  ///
> -  /// @param T - The target being registered.
> -  /// @param Fn - A function to construct a MCCodeGenInfo for the target.
> -  static void RegisterMCCodeGenInfo(Target &T,
> -                                    Target::MCCodeGenInfoCtorFnTy Fn) {
> -    T.MCCodeGenInfoCtorFn = Fn;
> +  static void registerMCAdjustCodeGenOpts(Target &T,
> +                                          Target::MCAdjustCodeGenOptsFnTy
> Fn) {
> +    T.MCAdjustCodeGenOptsFn = Fn;
>    }
>
>    /// RegisterMCInstrInfo - Register a MCInstrInfo implementation for the
> @@ -914,39 +897,9 @@ struct RegisterMCAsmInfoFn {
>    }
>  };
>
> -/// RegisterMCCodeGenInfo - Helper template for registering a target
> codegen
> -/// info
> -/// implementation.  This invokes the static "Create" method on the class
> -/// to actually do the construction.  Usage:
> -///
> -/// extern "C" void LLVMInitializeFooTarget() {
> -///   extern Target TheFooTarget;
> -///   RegisterMCCodeGenInfo<FooMCCodeGenInfo> X(TheFooTarget);
> -/// }
> -template <class MCCodeGenInfoImpl> struct RegisterMCCodeGenInfo {
> -  RegisterMCCodeGenInfo(Target &T) {
> -    TargetRegistry::RegisterMCCodeGenInfo(T, &Allocator);
> -  }
> -
> -private:
> -  static MCCodeGenInfo *Allocator(const Triple & /*TT*/, Reloc::Model
> /*RM*/,
> -                                  CodeModel::Model /*CM*/,
> -                                  CodeGenOpt::Level /*OL*/) {
> -    return new MCCodeGenInfoImpl();
> -  }
> -};
> -
> -/// RegisterMCCodeGenInfoFn - Helper template for registering a target
> codegen
> -/// info implementation.  This invokes the specified function to do the
> -/// construction.  Usage:
> -///
> -/// extern "C" void LLVMInitializeFooTarget() {
> -///   extern Target TheFooTarget;
> -///   RegisterMCCodeGenInfoFn X(TheFooTarget, TheFunction);
> -/// }
> -struct RegisterMCCodeGenInfoFn {
> -  RegisterMCCodeGenInfoFn(Target &T, Target::MCCodeGenInfoCtorFnTy Fn) {
> -    TargetRegistry::RegisterMCCodeGenInfo(T, Fn);
> +struct RegisterMCAdjustCodeGenOptsFn {
> +  RegisterMCAdjustCodeGenOptsFn(Target &T,
> Target::MCAdjustCodeGenOptsFnTy Fn) {
> +    TargetRegistry::registerMCAdjustCodeGenOpts(T, Fn);
>    }
>  };
>
>
> Modified: llvm/trunk/include/llvm/Target/TargetMachine.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetMachine.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetMachine.h Thu Jun 30 13:25:11 2016
> @@ -31,7 +31,6 @@ class Mangler;
>  class MachineFunctionInitializer;
>  class MachineModuleInfo;
>  class MCAsmInfo;
> -class MCCodeGenInfo;
>  class MCContext;
>  class MCInstrInfo;
>  class MCRegisterInfo;
> @@ -89,9 +88,9 @@ protected: // Can only create subclasses
>    std::string TargetCPU;
>    std::string TargetFS;
>
> -  /// Low level target information such as relocation model. Non-const to
> -  /// allow resetting optimization level per-function.
> -  MCCodeGenInfo *CodeGenInfo;
> +  Reloc::Model RM = Reloc::Static;
> +  CodeModel::Model CMModel = CodeModel::Default;
> +  CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
>
>    /// Contains target specific asm information.
>    const MCAsmInfo *AsmInfo;
> @@ -186,7 +185,7 @@ public:
>    CodeGenOpt::Level getOptLevel() const;
>
>    /// \brief Overrides the optimization level.
> -  void setOptLevel(CodeGenOpt::Level Level) const;
> +  void setOptLevel(CodeGenOpt::Level Level);
>
>    void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
>    bool getO0WantsFastISel() { return O0WantsFastISel; }
>
> Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Thu Jun 30 13:25:11 2016
> @@ -88,7 +88,10 @@ LLVMTargetMachine::LLVMTargetMachine(con
>                                       Reloc::Model RM, CodeModel::Model CM,
>                                       CodeGenOpt::Level OL)
>      : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {
> -  CodeGenInfo = T.createMCCodeGenInfo(TT.str(), RM, CM, OL);
> +  T.adjustCodeGenOpts(TT, RM, CM);
> +  this->RM = RM;
> +  this->CMModel = CM;
> +  this->OptLevel = OL;
>  }
>
>  TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
>
> Modified: llvm/trunk/lib/MC/CMakeLists.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/CMakeLists.txt?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/MC/CMakeLists.txt (original)
> +++ llvm/trunk/lib/MC/CMakeLists.txt Thu Jun 30 13:25:11 2016
> @@ -9,7 +9,6 @@ add_llvm_library(LLVMMC
>    MCAsmStreamer.cpp
>    MCAssembler.cpp
>    MCCodeEmitter.cpp
> -  MCCodeGenInfo.cpp
>    MCCodeView.cpp
>    MCContext.cpp
>    MCDwarf.cpp
>
> Removed: llvm/trunk/lib/MC/MCCodeGenInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCCodeGenInfo.cpp?rev=274257&view=auto
>
> ==============================================================================
> --- llvm/trunk/lib/MC/MCCodeGenInfo.cpp (original)
> +++ llvm/trunk/lib/MC/MCCodeGenInfo.cpp (removed)
> @@ -1,23 +0,0 @@
> -//===-- MCCodeGenInfo.cpp - Target CodeGen Info -----------------*- C++
> -*-===//
> -//
> -//                     The LLVM Compiler Infrastructure
> -//
> -// This file is distributed under the University of Illinois Open Source
> -// License. See LICENSE.TXT for details.
> -//
>
> -//===----------------------------------------------------------------------===//
> -//
> -// This file tracks information about the target which can affect codegen,
> -// asm parsing, and asm printing. For example, relocation model.
> -//
>
> -//===----------------------------------------------------------------------===//
> -
> -#include "llvm/MC/MCCodeGenInfo.h"
> -using namespace llvm;
> -
> -void MCCodeGenInfo::initMCCodeGenInfo(Reloc::Model RM, CodeModel::Model
> CM,
> -                                      CodeGenOpt::Level OL) {
> -  RelocationModel = RM;
> -  CMModel = CM;
> -  OptLevel = OL;
> -}
>
> Modified:
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp Thu
> Jun 30 13:25:11 2016
> @@ -15,7 +15,6 @@
>  #include "AArch64ELFStreamer.h"
>  #include "AArch64MCAsmInfo.h"
>  #include "InstPrinter/AArch64InstPrinter.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCStreamer.h"
> @@ -72,10 +71,8 @@ static MCAsmInfo *createAArch64MCAsmInfo
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createAArch64MCCodeGenInfo(const Triple &TT,
> -                                                 Reloc::Model RM,
> -                                                 CodeModel::Model CM,
> -                                                 CodeGenOpt::Level OL) {
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    assert((TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()) &&
>           "Only expect Darwin and ELF targets");
>
> @@ -89,10 +86,6 @@ static MCCodeGenInfo *createAArch64MCCod
>    else if (CM != CodeModel::Small && CM != CodeModel::Large)
>      report_fatal_error(
>          "Only small and large code models are allowed on AArch64");
> -
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  static MCInstPrinter *createAArch64MCInstPrinter(const Triple &T,
> @@ -131,7 +124,7 @@ extern "C" void LLVMInitializeAArch64Tar
>      RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
>
>      // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createAArch64MCCodeGenInfo);
> +    TargetRegistry::registerMCAdjustCodeGenOpts(*T, adjustCodeGenOpts);
>
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
>
> Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp Thu
> Jun 30 13:25:11 2016
> @@ -18,7 +18,6 @@
>  #include "AMDGPUTargetStreamer.h"
>  #include "InstPrinter/AMDGPUInstPrinter.h"
>  #include "SIDefines.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCContext.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
> @@ -56,15 +55,6 @@ createAMDGPUMCSubtargetInfo(const Triple
>    return createAMDGPUMCSubtargetInfoImpl(TT, CPU, FS);
>  }
>
> -static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(const Triple &TT,
> -                                                Reloc::Model RM,
> -                                                CodeModel::Model CM,
> -                                                CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCInstPrinter *createAMDGPUMCInstPrinter(const Triple &T,
>                                                  unsigned SyntaxVariant,
>                                                  const MCAsmInfo &MAI,
> @@ -99,7 +89,6 @@ extern "C" void LLVMInitializeAMDGPUTarg
>    for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {
>      RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
>
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createAMDGPUMCCodeGenInfo);
>      TargetRegistry::RegisterMCInstrInfo(*T, createAMDGPUMCInstrInfo);
>      TargetRegistry::RegisterMCRegInfo(*T, createAMDGPUMCRegisterInfo);
>      TargetRegistry::RegisterMCSubtargetInfo(*T,
> createAMDGPUMCSubtargetInfo);
>
> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp Thu Jun 30
> 13:25:11 2016
> @@ -16,7 +16,6 @@
>  #include "ARMMCTargetDesc.h"
>  #include "InstPrinter/ARMInstPrinter.h"
>  #include "llvm/ADT/Triple.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCELFStreamer.h"
>  #include "llvm/MC/MCInstrAnalysis.h"
>  #include "llvm/MC/MCInstrInfo.h"
> @@ -201,14 +200,6 @@ static MCAsmInfo *createARMMCAsmInfo(con
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createARMMCCodeGenInfo(const Triple &TT,
> Reloc::Model RM,
> -                                             CodeModel::Model CM,
> -                                             CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
>                                       MCAsmBackend &MAB, raw_pwrite_stream
> &OS,
>                                       MCCodeEmitter *Emitter, bool
> RelaxAll) {
> @@ -287,9 +278,6 @@ extern "C" void LLVMInitializeARMTargetM
>      // Register the MC asm info.
>      RegisterMCAsmInfoFn X(*T, createARMMCAsmInfo);
>
> -    // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createARMMCCodeGenInfo);
> -
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createARMMCInstrInfo);
>
>
> Modified: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp (original)
> +++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp Thu Jun 30
> 13:25:11 2016
> @@ -15,7 +15,6 @@
>  #include "BPFMCTargetDesc.h"
>  #include "BPFMCAsmInfo.h"
>  #include "InstPrinter/BPFInstPrinter.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCStreamer.h"
> @@ -51,14 +50,6 @@ static MCSubtargetInfo *createBPFMCSubta
>    return createBPFMCSubtargetInfoImpl(TT, CPU, FS);
>  }
>
> -static MCCodeGenInfo *createBPFMCCodeGenInfo(const Triple &TT,
> Reloc::Model RM,
> -                                             CodeModel::Model CM,
> -                                             CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCStreamer *createBPFMCStreamer(const Triple &T,
>                                         MCContext &Ctx, MCAsmBackend &MAB,
>                                         raw_pwrite_stream &OS,
> MCCodeEmitter *Emitter,
> @@ -81,9 +72,6 @@ extern "C" void LLVMInitializeBPFTargetM
>      // Register the MC asm info.
>      RegisterMCAsmInfo<BPFMCAsmInfo> X(*T);
>
> -    // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createBPFMCCodeGenInfo);
> -
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createBPFMCInstrInfo);
>
>
> Modified:
> llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp Thu
> Jun 30 13:25:11 2016
> @@ -16,7 +16,6 @@
>  #include "HexagonMCAsmInfo.h"
>  #include "HexagonMCELFStreamer.h"
>  #include "MCTargetDesc/HexagonInstPrinter.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCContext.h"
>  #include "llvm/MC/MCELFStreamer.h"
>  #include "llvm/MC/MCInstrInfo.h"
> @@ -199,15 +198,6 @@ static MCAsmInfo *createHexagonMCAsmInfo
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createHexagonMCCodeGenInfo(const Triple &TT,
> -                                                 Reloc::Model RM,
> -                                                 CodeModel::Model CM,
> -                                                 CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCInstPrinter *createHexagonMCInstPrinter(const Triple &T,
>                                                   unsigned SyntaxVariant,
>                                                   const MCAsmInfo &MAI,
> @@ -242,10 +232,6 @@ extern "C" void LLVMInitializeHexagonTar
>    // Register the MC asm info.
>    RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
>
> -  // Register the MC codegen info.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
> -                                        createHexagonMCCodeGenInfo);
> -
>    // Register the MC instruction info.
>    TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
>                                        createHexagonMCInstrInfo);
>
> Modified: llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -15,7 +15,6 @@
>
>  #include "InstPrinter/LanaiInstPrinter.h"
>  #include "LanaiMCAsmInfo.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrAnalysis.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCStreamer.h"
> @@ -55,15 +54,6 @@ createLanaiMCSubtargetInfo(const Triple
>    return createLanaiMCSubtargetInfoImpl(TT, CPUName, FS);
>  }
>
> -static MCCodeGenInfo *createLanaiMCCodeGenInfo(const Triple &TT,
> -                                               Reloc::Model RM,
> -                                               CodeModel::Model CM,
> -                                               CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
>                                      MCAsmBackend &MAB, raw_pwrite_stream
> &OS,
>                                      MCCodeEmitter *Emitter, bool
> RelaxAll) {
> @@ -125,10 +115,6 @@ extern "C" void LLVMInitializeLanaiTarge
>    // Register the MC asm info.
>    RegisterMCAsmInfo<LanaiMCAsmInfo> X(TheLanaiTarget);
>
> -  // Register the MC codegen info.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheLanaiTarget,
> -                                        createLanaiMCCodeGenInfo);
> -
>    // Register the MC instruction info.
>    TargetRegistry::RegisterMCInstrInfo(TheLanaiTarget,
> createLanaiMCInstrInfo);
>
>
> Modified: llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp Thu
> Jun 30 13:25:11 2016
> @@ -14,7 +14,6 @@
>  #include "MSP430MCTargetDesc.h"
>  #include "InstPrinter/MSP430InstPrinter.h"
>  #include "MSP430MCAsmInfo.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCSubtargetInfo.h"
> @@ -48,15 +47,6 @@ createMSP430MCSubtargetInfo(const Triple
>    return createMSP430MCSubtargetInfoImpl(TT, CPU, FS);
>  }
>
> -static MCCodeGenInfo *createMSP430MCCodeGenInfo(const Triple &TT,
> -                                                Reloc::Model RM,
> -                                                CodeModel::Model CM,
> -                                                CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
>                                                  unsigned SyntaxVariant,
>                                                  const MCAsmInfo &MAI,
> @@ -71,10 +61,6 @@ extern "C" void LLVMInitializeMSP430Targ
>    // Register the MC asm info.
>    RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
>
> -  // Register the MC codegen info.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target,
> -                                        createMSP430MCCodeGenInfo);
> -
>    // Register the MC instruction info.
>    TargetRegistry::RegisterMCInstrInfo(TheMSP430Target,
> createMSP430MCInstrInfo);
>
>
> Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -18,7 +18,6 @@
>  #include "MipsMCNaCl.h"
>  #include "MipsTargetStreamer.h"
>  #include "llvm/ADT/Triple.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCELFStreamer.h"
>  #include "llvm/MC/MCInstrAnalysis.h"
>  #include "llvm/MC/MCInstrInfo.h"
> @@ -82,14 +81,6 @@ static MCAsmInfo *createMipsMCAsmInfo(co
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createMipsMCCodeGenInfo(const Triple &TT,
> Reloc::Model RM,
> -                                              CodeModel::Model CM,
> -                                              CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCInstPrinter *createMipsMCInstPrinter(const Triple &T,
>                                                unsigned SyntaxVariant,
>                                                const MCAsmInfo &MAI,
> @@ -163,9 +154,6 @@ extern "C" void LLVMInitializeMipsTarget
>      // Register the MC asm info.
>      RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo);
>
> -    // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createMipsMCCodeGenInfo);
> -
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createMipsMCInstrInfo);
>
>
> Modified: llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -14,7 +14,6 @@
>  #include "NVPTXMCTargetDesc.h"
>  #include "InstPrinter/NVPTXInstPrinter.h"
>  #include "NVPTXMCAsmInfo.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCSubtargetInfo.h"
> @@ -49,16 +48,6 @@ createNVPTXMCSubtargetInfo(const Triple
>    return createNVPTXMCSubtargetInfoImpl(TT, CPU, FS);
>  }
>
> -static MCCodeGenInfo *createNVPTXMCCodeGenInfo(const Triple &TT,
> -                                               Reloc::Model RM,
> -                                               CodeModel::Model CM,
> -                                               CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
> -}
> -
>  static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
>                                                 unsigned SyntaxVariant,
>                                                 const MCAsmInfo &MAI,
> @@ -75,9 +64,6 @@ extern "C" void LLVMInitializeNVPTXTarge
>      // Register the MC asm info.
>      RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
>
> -    // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createNVPTXMCCodeGenInfo);
> -
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
>
>
> Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -15,7 +15,6 @@
>  #include "InstPrinter/PPCInstPrinter.h"
>  #include "PPCMCAsmInfo.h"
>  #include "PPCTargetStreamer.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCContext.h"
>  #include "llvm/MC/MCELFStreamer.h"
>  #include "llvm/MC/MCExpr.h"
> @@ -87,18 +86,13 @@ static MCAsmInfo *createPPCMCAsmInfo(con
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createPPCMCCodeGenInfo(const Triple &TT,
> Reloc::Model RM,
> -                                             CodeModel::Model CM,
> -                                             CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    if (CM == CodeModel::Default) {
>      if (!TT.isOSDarwin() &&
>          (TT.getArch() == Triple::ppc64 || TT.getArch() ==
> Triple::ppc64le))
>        CM = CodeModel::Medium;
>    }
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  namespace {
> @@ -239,7 +233,7 @@ extern "C" void LLVMInitializePowerPCTar
>      RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
>
>      // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createPPCMCCodeGenInfo);
> +    TargetRegistry::registerMCAdjustCodeGenOpts(*T, adjustCodeGenOpts);
>
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo);
>
> Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -15,7 +15,6 @@
>  #include "InstPrinter/SparcInstPrinter.h"
>  #include "SparcMCAsmInfo.h"
>  #include "SparcTargetStreamer.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCSubtargetInfo.h"
> @@ -81,12 +80,8 @@ createSparcMCSubtargetInfo(const Triple
>  //
>  // All code models require that the text segment is smaller than 2GB.
>
> -static MCCodeGenInfo *createSparcMCCodeGenInfo(const Triple &TT,
> -                                               Reloc::Model RM,
> -                                               CodeModel::Model CM,
> -                                               CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    // The default 32-bit code model is abs32/pic32 and the default 32-bit
>    // code model for JIT is abs32.
>    switch (CM) {
> @@ -94,17 +89,10 @@ static MCCodeGenInfo *createSparcMCCodeG
>    case CodeModel::Default:
>    case CodeModel::JITDefault: CM = CodeModel::Small; break;
>    }
> -
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
> -static MCCodeGenInfo *createSparcV9MCCodeGenInfo(const Triple &TT,
> -                                                 Reloc::Model RM,
> -                                                 CodeModel::Model CM,
> -                                                 CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -
> +static void adjustCodeGenOptsV9(const Triple &TT, Reloc::Model RM,
> +                                CodeModel::Model &CM) {
>    // The default 64-bit code model is abs44/pic32 and the default 64-bit
>    // code model for JIT is abs64.
>    switch (CM) {
> @@ -116,9 +104,6 @@ static MCCodeGenInfo *createSparcV9MCCod
>      CM = CodeModel::Large;
>      break;
>    }
> -
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  static MCTargetStreamer *
> @@ -175,10 +160,10 @@ extern "C" void LLVMInitializeSparcTarge
>    }
>
>    // Register the MC codegen info.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
> -                                        createSparcMCCodeGenInfo);
> -  TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
> -                                        createSparcV9MCCodeGenInfo);
> -  TargetRegistry::RegisterMCCodeGenInfo(TheSparcelTarget,
> -                                        createSparcMCCodeGenInfo);
> +  TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcTarget,
> +                                              adjustCodeGenOpts);
> +  TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcV9Target,
> +                                              adjustCodeGenOptsV9);
> +  TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcelTarget,
> +                                              adjustCodeGenOpts);
>  }
>
> Modified:
> llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp Thu
> Jun 30 13:25:11 2016
> @@ -10,7 +10,6 @@
>  #include "SystemZMCTargetDesc.h"
>  #include "InstPrinter/SystemZInstPrinter.h"
>  #include "SystemZMCAsmInfo.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCStreamer.h"
> @@ -159,11 +158,8 @@ createSystemZMCSubtargetInfo(const Tripl
>    return createSystemZMCSubtargetInfoImpl(TT, CPU, FS);
>  }
>
> -static MCCodeGenInfo *createSystemZMCCodeGenInfo(const Triple &TT,
> -                                                 Reloc::Model RM,
> -                                                 CodeModel::Model CM,
> -                                                 CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    // For SystemZ we define the models as follows:
>    //
>    // Small:  BRASL can call any function and will use a stub if necessary.
> @@ -197,8 +193,6 @@ static MCCodeGenInfo *createSystemZMCCod
>      CM = CodeModel::Small;
>    else if (CM == CodeModel::JITDefault)
>      CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
> @@ -214,9 +208,9 @@ extern "C" void LLVMInitializeSystemZTar
>    TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
>                                      createSystemZMCAsmInfo);
>
> -  // Register the MCCodeGenInfo.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
> -                                        createSystemZMCCodeGenInfo);
> +  // Register the adjustCodeGenOpts.
> +  TargetRegistry::registerMCAdjustCodeGenOpts(TheSystemZTarget,
> +                                              adjustCodeGenOpts);
>
>    // Register the MCCodeEmitter.
>    TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
>
> Modified: llvm/trunk/lib/Target/TargetMachine.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/TargetMachine.cpp (original)
> +++ llvm/trunk/lib/Target/TargetMachine.cpp Thu Jun 30 13:25:11 2016
> @@ -21,7 +21,6 @@
>  #include "llvm/IR/LegacyPassManager.h"
>  #include "llvm/IR/Mangler.h"
>  #include "llvm/MC/MCAsmInfo.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCContext.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCSectionMachO.h"
> @@ -40,12 +39,10 @@ TargetMachine::TargetMachine(const Targe
>                               const Triple &TT, StringRef CPU, StringRef
> FS,
>                               const TargetOptions &Options)
>      : TheTarget(T), DL(DataLayoutString), TargetTriple(TT),
> TargetCPU(CPU),
> -      TargetFS(FS), CodeGenInfo(nullptr), AsmInfo(nullptr), MRI(nullptr),
> -      MII(nullptr), STI(nullptr), RequireStructuredCFG(false),
> -      Options(Options) {}
> +      TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr),
> STI(nullptr),
> +      RequireStructuredCFG(false), Options(Options) {}
>
>  TargetMachine::~TargetMachine() {
> -  delete CodeGenInfo;
>    delete AsmInfo;
>    delete MRI;
>    delete MII;
> @@ -77,19 +74,11 @@ void TargetMachine::resetTargetOptions(c
>
>  /// Returns the code generation relocation model. The choices are static,
> PIC,
>  /// and dynamic-no-pic.
> -Reloc::Model TargetMachine::getRelocationModel() const {
> -  if (!CodeGenInfo)
> -    return Reloc::Static; // FIXME
> -  return CodeGenInfo->getRelocationModel();
> -}
> +Reloc::Model TargetMachine::getRelocationModel() const { return RM; }
>
>  /// Returns the code model. The choices are small, kernel, medium, large,
> and
>  /// target default.
> -CodeModel::Model TargetMachine::getCodeModel() const {
> -  if (!CodeGenInfo)
> -    return CodeModel::Default;
> -  return CodeGenInfo->getCodeModel();
> -}
> +CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; }
>
>  /// Get the IR-specified TLS model for Var.
>  static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
> @@ -182,16 +171,9 @@ TLSModel::Model TargetMachine::getTLSMod
>  }
>
>  /// Returns the optimization level: None, Less, Default, or Aggressive.
> -CodeGenOpt::Level TargetMachine::getOptLevel() const {
> -  if (!CodeGenInfo)
> -    return CodeGenOpt::Default;
> -  return CodeGenInfo->getOptLevel();
> -}
> +CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; }
>
> -void TargetMachine::setOptLevel(CodeGenOpt::Level Level) const {
> -  if (CodeGenInfo)
> -    CodeGenInfo->setOptLevel(Level);
> -}
> +void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel =
> Level; }
>
>  TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
>    return TargetIRAnalysis([this](const Function &F) {
>
> Modified:
> llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> ---
> llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
> (original)
> +++
> llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
> Thu Jun 30 13:25:11 2016
> @@ -16,7 +16,6 @@
>  #include "InstPrinter/WebAssemblyInstPrinter.h"
>  #include "WebAssemblyMCAsmInfo.h"
>  #include "WebAssemblyTargetStreamer.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCSubtargetInfo.h"
> @@ -40,18 +39,13 @@ static MCAsmInfo *createMCAsmInfo(const
>    return new WebAssemblyMCAsmInfo(TT);
>  }
>
> -static MCCodeGenInfo *createMCCodeGenInfo(const Triple & /*TT*/,
> -                                          Reloc::Model /*RM*/,
> -                                          CodeModel::Model CM,
> -                                          CodeGenOpt::Level OL) {
> +static void adjustCodeGenOpts(const Triple & /*TT*/, Reloc::Model /*RM*/,
> +                              CodeModel::Model &CM) {
>    CodeModel::Model M = (CM == CodeModel::Default || CM ==
> CodeModel::JITDefault)
>                             ? CodeModel::Large
>                             : CM;
>    if (M != CodeModel::Large)
>      report_fatal_error("Non-large code models are not supported yet");
> -  MCCodeGenInfo *CGI = new MCCodeGenInfo();
> -  CGI->initMCCodeGenInfo(Reloc::PIC_, CM, OL);
> -  return CGI;
>  }
>
>  static MCInstrInfo *createMCInstrInfo() {
> @@ -114,7 +108,7 @@ extern "C" void LLVMInitializeWebAssembl
>      TargetRegistry::RegisterMCInstrInfo(*T, createMCInstrInfo);
>
>      // Register the MC codegen info.
> -    TargetRegistry::RegisterMCCodeGenInfo(*T, createMCCodeGenInfo);
> +    TargetRegistry::registerMCAdjustCodeGenOpts(*T, adjustCodeGenOpts);
>
>      // Register the MC register info.
>      TargetRegistry::RegisterMCRegInfo(*T, createMCRegisterInfo);
>
> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp (original)
> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp Thu Jun 30
> 13:25:11 2016
> @@ -16,7 +16,6 @@
>  #include "InstPrinter/X86IntelInstPrinter.h"
>  #include "X86MCAsmInfo.h"
>  #include "llvm/ADT/Triple.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrAnalysis.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
> @@ -199,11 +198,8 @@ static MCAsmInfo *createX86MCAsmInfo(con
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createX86MCCodeGenInfo(const Triple &TT,
> Reloc::Model RM,
> -                                             CodeModel::Model CM,
> -                                             CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> -
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    bool is64Bit = TT.getArch() == Triple::x86_64;
>
>    // For static codegen, if we're not already set, use Small codegen.
> @@ -212,9 +208,6 @@ static MCCodeGenInfo *createX86MCCodeGen
>    else if (CM == CodeModel::JITDefault)
>      // 64-bit JIT places everything in the same buffer except external
> funcs.
>      CM = is64Bit ? CodeModel::Large : CodeModel::Small;
> -
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  static MCInstPrinter *createX86MCInstPrinter(const Triple &T,
> @@ -246,7 +239,7 @@ extern "C" void LLVMInitializeX86TargetM
>      RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
>
>      // Register the MC codegen info.
> -    RegisterMCCodeGenInfoFn Y(*T, createX86MCCodeGenInfo);
> +    RegisterMCAdjustCodeGenOptsFn Y(*T, adjustCodeGenOpts);
>
>      // Register the MC instruction info.
>      TargetRegistry::RegisterMCInstrInfo(*T, createX86MCInstrInfo);
>
> Modified: llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp?rev=274258&r1=274257&r2=274258&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
> (original)
> +++ llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp Thu Jun
> 30 13:25:11 2016
> @@ -15,7 +15,6 @@
>  #include "InstPrinter/XCoreInstPrinter.h"
>  #include "XCoreMCAsmInfo.h"
>  #include "XCoreTargetStreamer.h"
> -#include "llvm/MC/MCCodeGenInfo.h"
>  #include "llvm/MC/MCInstrInfo.h"
>  #include "llvm/MC/MCRegisterInfo.h"
>  #include "llvm/MC/MCSubtargetInfo.h"
> @@ -62,19 +61,13 @@ static MCAsmInfo *createXCoreMCAsmInfo(c
>    return MAI;
>  }
>
> -static MCCodeGenInfo *createXCoreMCCodeGenInfo(const Triple &TT,
> -                                               Reloc::Model RM,
> -                                               CodeModel::Model CM,
> -                                               CodeGenOpt::Level OL) {
> -  MCCodeGenInfo *X = new MCCodeGenInfo();
> +static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
> +                              CodeModel::Model &CM) {
>    if (CM == CodeModel::Default) {
>      CM = CodeModel::Small;
>    }
>    if (CM != CodeModel::Small && CM != CodeModel::Large)
>      report_fatal_error("Target only supports CodeModel Small or Large");
> -
> -  X->initMCCodeGenInfo(RM, CM, OL);
> -  return X;
>  }
>
>  static MCInstPrinter *createXCoreMCInstPrinter(const Triple &T,
> @@ -134,8 +127,8 @@ extern "C" void LLVMInitializeXCoreTarge
>    RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
>
>    // Register the MC codegen info.
> -  TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
> -                                        createXCoreMCCodeGenInfo);
> +  TargetRegistry::registerMCAdjustCodeGenOpts(TheXCoreTarget,
> +                                              adjustCodeGenOpts);
>
>    // Register the MC instruction info.
>    TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget,
> createXCoreMCInstrInfo);
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>



-- 

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