[llvm] r274674 - [NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.
Justin Lebar via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 6 14:06:10 PDT 2016
Author: jlebar
Date: Wed Jul 6 16:06:10 2016
New Revision: 274674
URL: http://llvm.org/viewvc/llvm-project?rev=274674&view=rev
Log:
[NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.
Reviewers: tra
Subscribers: jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D22068
Added:
llvm/trunk/test/CodeGen/NVPTX/sm-version-60.ll
llvm/trunk/test/CodeGen/NVPTX/sm-version-61.ll
llvm/trunk/test/CodeGen/NVPTX/sm-version-62.ll
Modified:
llvm/trunk/lib/Target/NVPTX/NVPTX.td
Modified: llvm/trunk/lib/Target/NVPTX/NVPTX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTX.td?rev=274674&r1=274673&r2=274674&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTX.td (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTX.td Wed Jul 6 16:06:10 2016
@@ -44,6 +44,12 @@ def SM52 : SubtargetFeature<"sm_52", "Sm
"Target SM 5.2">;
def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
"Target SM 5.3">;
+def SM60 : SubtargetFeature<"sm_60", "SmVersion", "60",
+ "Target SM 6.0">;
+def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61",
+ "Target SM 6.1">;
+def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
+ "Target SM 6.2">;
// PTX Versions
def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
@@ -54,6 +60,10 @@ def PTX41 : SubtargetFeature<"ptx41", "P
"Use PTX version 4.1">;
def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
"Use PTX version 4.2">;
+def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43",
+ "Use PTX version 4.3">;
+def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
+ "Use PTX version 5.0">;
//===----------------------------------------------------------------------===//
// NVPTX supported processors.
@@ -71,7 +81,9 @@ def : Proc<"sm_37", [SM37, PTX41]>;
def : Proc<"sm_50", [SM50, PTX40]>;
def : Proc<"sm_52", [SM52, PTX41]>;
def : Proc<"sm_53", [SM53, PTX42]>;
-
+def : Proc<"sm_60", [SM60, PTX50]>;
+def : Proc<"sm_61", [SM61, PTX50]>;
+def : Proc<"sm_62", [SM62, PTX50]>;
def NVPTXInstrInfo : InstrInfo {
}
Added: llvm/trunk/test/CodeGen/NVPTX/sm-version-60.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/sm-version-60.ll?rev=274674&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/NVPTX/sm-version-60.ll (added)
+++ llvm/trunk/test/CodeGen/NVPTX/sm-version-60.ll Wed Jul 6 16:06:10 2016
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_60 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_60 | FileCheck %s
+
+; CHECK: .version 5.0
+; CHECK: .target sm_60
Added: llvm/trunk/test/CodeGen/NVPTX/sm-version-61.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/sm-version-61.ll?rev=274674&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/NVPTX/sm-version-61.ll (added)
+++ llvm/trunk/test/CodeGen/NVPTX/sm-version-61.ll Wed Jul 6 16:06:10 2016
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_61 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_61 | FileCheck %s
+
+; CHECK: .version 5.0
+; CHECK: .target sm_61
Added: llvm/trunk/test/CodeGen/NVPTX/sm-version-62.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/sm-version-62.ll?rev=274674&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/NVPTX/sm-version-62.ll (added)
+++ llvm/trunk/test/CodeGen/NVPTX/sm-version-62.ll Wed Jul 6 16:06:10 2016
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_62 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_62 | FileCheck %s
+
+; CHECK: .version 5.0
+; CHECK: .target sm_62
More information about the llvm-commits
mailing list