[PATCH] D21091: AArch64: refactor sysreg handling (new TableGen backend!)
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 5 15:41:39 PDT 2016
ab added inline comments.
================
Comment at: utils/TableGen/SearchableTableEmitter.cpp:232
@@ +231,3 @@
+ raw_ostream &OS) {
+ std::string TableName = InstanceClass->getName();
+ std::vector<Record *> Items = Records.getAllDerivedDefinitions(TableName);
----------------
t.p.northover wrote:
> ab wrote:
> > const&? Or is the copy intentional?
> getAllDerivedDefinitions returns an std::vector by value so I think they're equivalent (via RVO).
Ah, I meant for TableName
Repository:
rL LLVM
http://reviews.llvm.org/D21091
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