[llvm] r274431 - Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
Manman Ren via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 5 15:25:28 PDT 2016
> On Jul 2, 2016, at 4:41 AM, Benjamin Kramer via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> Author: d0k
> Date: Sat Jul 2 06:41:39 2016
> New Revision: 274431
>
> URL: http://llvm.org/viewvc/llvm-project?rev=274431&view=rev
> Log:
> Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
>
> No functionality change intended.
>
> Modified:
> llvm/trunk/lib/Analysis/ScalarEvolution.cpp
> llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp
> llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h
> llvm/trunk/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
> llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
> llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp
> llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp
>
> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
> +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sat Jul 2 06:41:39 2016
> @@ -3022,9 +3022,7 @@ ScalarEvolution::getGEPExpr(Type *Pointe
>
> const SCEV *ScalarEvolution::getSMaxExpr(const SCEV *LHS,
> const SCEV *RHS) {
> - SmallVector<const SCEV *, 2> Ops;
> - Ops.push_back(LHS);
> - Ops.push_back(RHS);
> + SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
> return getSMaxExpr(Ops);
> }
>
> @@ -3125,9 +3123,7 @@ ScalarEvolution::getSMaxExpr(SmallVector
>
> const SCEV *ScalarEvolution::getUMaxExpr(const SCEV *LHS,
> const SCEV *RHS) {
> - SmallVector<const SCEV *, 2> Ops;
> - Ops.push_back(LHS);
> - Ops.push_back(RHS);
> + SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
> return getUMaxExpr(Ops);
> }
>
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp Sat Jul 2 06:41:39 2016
> @@ -628,10 +628,7 @@ static void computeADRP(const InstrToIns
> continue;
> }
> DEBUG(dbgs() << "Record AdrpAdrp:\n" << *L2 << '\n' << *L1 << '\n');
> - SmallVector<const MachineInstr *, 2> Args;
> - Args.push_back(L2);
> - Args.push_back(L1);
> - AArch64FI.addLOHDirective(MCLOH_AdrpAdrp, Args);
> + AArch64FI.addLOHDirective(MCLOH_AdrpAdrp, {L1, L2});
Did you swap the order of L2 and L1 here?
Manman
> ++NumADRPSimpleCandidate;
> }
> #ifdef DEBUG
> @@ -765,13 +762,9 @@ static bool registerADRCandidate(const M
> "ADD already involved in LOH.");
> DEBUG(dbgs() << "Record AdrpAdd\n" << Def << '\n' << Use << '\n');
>
> - SmallVector<const MachineInstr *, 2> Args;
> - Args.push_back(&Def);
> - Args.push_back(&Use);
> -
> - AArch64FI.addLOHDirective(Use.getOpcode() == AArch64::ADDXri ? MCLOH_AdrpAdd
> - : MCLOH_AdrpLdrGot,
> - Args);
> + AArch64FI.addLOHDirective(
> + Use.getOpcode() == AArch64::ADDXri ? MCLOH_AdrpAdd : MCLOH_AdrpLdrGot,
> + {&Def, &Use});
> return true;
> }
>
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Jul 2 06:41:39 2016
> @@ -3535,11 +3535,8 @@ SDValue AArch64TargetLowering::LowerELFT
> SDValue Chain = DAG.getEntryNode();
> SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
>
> - SmallVector<SDValue, 2> Ops;
> - Ops.push_back(Chain);
> - Ops.push_back(SymAddr);
> -
> - Chain = DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, Ops);
> + Chain =
> + DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, {Chain, SymAddr});
> SDValue Glue = Chain.getValue(1);
>
> return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue);
> @@ -8931,9 +8928,10 @@ static SDValue performPostLD1Combine(SDN
> LoadSDN->getMemOperand());
>
> // Update the uses.
> - SmallVector<SDValue, 2> NewResults;
> - NewResults.push_back(SDValue(LD, 0)); // The result of load
> - NewResults.push_back(SDValue(UpdN.getNode(), 2)); // Chain
> + SDValue NewResults[] = {
> + SDValue(LD, 0), // The result of load
> + SDValue(UpdN.getNode(), 2) // Chain
> + };
> DCI.CombineTo(LD, NewResults);
> DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result
> DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h Sat Jul 2 06:41:39 2016
> @@ -166,15 +166,15 @@ public:
> SmallVector<const MachineInstr *, 3> Args;
>
> public:
> - typedef SmallVectorImpl<const MachineInstr *> LOHArgs;
> + typedef ArrayRef<const MachineInstr *> LOHArgs;
>
> - MILOHDirective(MCLOHType Kind, const LOHArgs &Args)
> + MILOHDirective(MCLOHType Kind, LOHArgs Args)
> : Kind(Kind), Args(Args.begin(), Args.end()) {
> assert(isValidMCLOHType(Kind) && "Invalid LOH directive type!");
> }
>
> MCLOHType getKind() const { return Kind; }
> - const LOHArgs &getArgs() const { return Args; }
> + LOHArgs getArgs() const { return Args; }
> };
>
> typedef MILOHDirective::LOHArgs MILOHArgs;
> @@ -183,7 +183,7 @@ public:
> const MILOHContainer &getLOHContainer() const { return LOHContainerSet; }
>
> /// Add a LOH directive of this @p Kind and this @p Args.
> - void addLOHDirective(MCLOHType Kind, const MILOHArgs &Args) {
> + void addLOHDirective(MCLOHType Kind, MILOHArgs Args) {
> LOHContainerSet.push_back(MILOHDirective(Kind, Args));
> LOHRelated.insert(Args.begin(), Args.end());
> }
>
> Modified: llvm/trunk/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp (original)
> +++ llvm/trunk/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp Sat Jul 2 06:41:39 2016
> @@ -182,11 +182,8 @@ Value *GenericToNVVM::getOrInsertCVTA(Mo
> // Insert the address space conversion.
> Type *ResultType =
> PointerType::get(Type::getInt8Ty(Context), llvm::ADDRESS_SPACE_GENERIC);
> - SmallVector<Type *, 2> ParamTypes;
> - ParamTypes.push_back(ResultType);
> - ParamTypes.push_back(DestTy);
> Function *CVTAFunction = Intrinsic::getDeclaration(
> - M, Intrinsic::nvvm_ptr_global_to_gen, ParamTypes);
> + M, Intrinsic::nvvm_ptr_global_to_gen, {ResultType, DestTy});
> CVTA = Builder.CreateCall(CVTAFunction, CVTA, "cvta");
> // Another bitcast from i8 * to <the element type of GVType> * is
> // required.
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp Sat Jul 2 06:41:39 2016
> @@ -73,10 +73,7 @@ protected:
> DebugLoc DL = MI->getDebugLoc();
> unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
> unsigned Opc1, Opc2;
> - SmallVector<unsigned, 4> OrigRegs;
> - OrigRegs.push_back(OutReg);
> - OrigRegs.push_back(InReg);
> - OrigRegs.push_back(GPR3);
> + const unsigned OrigRegs[] = {OutReg, InReg, GPR3};
>
> switch (MI->getOpcode()) {
> default:
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Sat Jul 2 06:41:39 2016
> @@ -2076,16 +2076,15 @@ SDValue SparcTargetLowering::LowerGlobal
> SDValue Symbol = withTargetFlags(Op, callTF, DAG);
>
> SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
> - SmallVector<SDValue, 4> Ops;
> - Ops.push_back(Chain);
> - Ops.push_back(Callee);
> - Ops.push_back(Symbol);
> - Ops.push_back(DAG.getRegister(SP::O0, PtrVT));
> const uint32_t *Mask = Subtarget->getRegisterInfo()->getCallPreservedMask(
> DAG.getMachineFunction(), CallingConv::C);
> assert(Mask && "Missing call preserved mask for calling convention");
> - Ops.push_back(DAG.getRegisterMask(Mask));
> - Ops.push_back(InFlag);
> + SDValue Ops[] = {Chain,
> + Callee,
> + Symbol,
> + DAG.getRegister(SP::O0, PtrVT),
> + DAG.getRegisterMask(Mask),
> + InFlag};
> Chain = DAG.getNode(SPISD::TLS_CALL, DL, NodeTys, Ops);
> InFlag = Chain.getValue(1);
> Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(1, DL, true),
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreLowerThreadLocal.cpp Sat Jul 2 06:41:39 2016
> @@ -179,7 +179,6 @@ static bool isZeroLengthArray(Type *Ty)
>
> bool XCoreLowerThreadLocal::lowerGlobal(GlobalVariable *GV) {
> Module *M = GV->getParent();
> - LLVMContext &Ctx = M->getContext();
> if (!GV->isThreadLocal())
> return false;
>
> @@ -210,11 +209,8 @@ bool XCoreLowerThreadLocal::lowerGlobal(
> Function *GetID = Intrinsic::getDeclaration(GV->getParent(),
> Intrinsic::xcore_getid);
> Value *ThreadID = Builder.CreateCall(GetID, {});
> - SmallVector<Value *, 2> Indices;
> - Indices.push_back(Constant::getNullValue(Type::getInt64Ty(Ctx)));
> - Indices.push_back(ThreadID);
> - Value *Addr =
> - Builder.CreateInBoundsGEP(NewGV->getValueType(), NewGV, Indices);
> + Value *Addr = Builder.CreateInBoundsGEP(NewGV->getValueType(), NewGV,
> + {Builder.getInt64(0), ThreadID});
> U->replaceUsesOfWith(GV, Addr);
> }
>
>
> Modified: llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp?rev=274431&r1=274430&r2=274431&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp (original)
> +++ llvm/trunk/lib/Transforms/Instrumentation/GCOVProfiling.cpp Sat Jul 2 06:41:39 2016
> @@ -633,11 +633,8 @@ bool GCOVProfiler::emitProfileArcs() {
> Value *Sel = Builder.CreateSelect(BI->getCondition(),
> Builder.getInt64(Edge),
> Builder.getInt64(Edge + 1));
> - SmallVector<Value *, 2> Idx;
> - Idx.push_back(Builder.getInt64(0));
> - Idx.push_back(Sel);
> - Value *Counter = Builder.CreateInBoundsGEP(Counters->getValueType(),
> - Counters, Idx);
> + Value *Counter = Builder.CreateInBoundsGEP(
> + Counters->getValueType(), Counters, {Builder.getInt64(0), Sel});
> Value *Count = Builder.CreateLoad(Counter);
> Count = Builder.CreateAdd(Count, Builder.getInt64(1));
> Builder.CreateStore(Count, Counter);
>
>
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