[llvm] r274527 - AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 4 17:12:51 PDT 2016
Author: tstellar
Date: Mon Jul 4 19:12:51 2016
New Revision: 274527
URL: http://llvm.org/viewvc/llvm-project?rev=274527&view=rev
Log:
AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads
This moves of the r600 logic out of isGlobalLoad() and into the
TableGen files.
Differential Revision: http://reviews.llvm.org/D21710
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td
llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td
llvm/trunk/lib/Target/AMDGPU/R600Instructions.td
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp?rev=274527&r1=274526&r2=274527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp Mon Jul 4 19:12:51 2016
@@ -529,11 +529,6 @@ bool AMDGPUDAGToDAGISel::isConstantLoad(
bool AMDGPUDAGToDAGISel::isGlobalLoad(const MemSDNode *N) const {
if (!N->readMem())
return false;
- if (N->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS) {
- if (Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS)
- return !isa<GlobalValue>(GetUnderlyingObject(
- N->getMemOperand()->getValue(), CurDAG->getDataLayout()));
- }
return checkType(N->getMemOperand()->getValue(), AMDGPUAS::GLOBAL_ADDRESS);
}
Modified: llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td?rev=274527&r1=274526&r2=274527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td Mon Jul 4 19:12:51 2016
@@ -202,53 +202,53 @@ def VTX_READ_PARAM_128_cm : VTX_READ_128
//===----------------------------------------------------------------------===//
// 8-bit reads
-def VTX_READ_GLOBAL_8_cm : VTX_READ_8_cm <1,
- [(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_8_cm : VTX_READ_8_cm <1,
+ [(set i32:$dst_gpr, (vtx_id1_az_extloadi8 ADDRVTX_READ:$src_gpr))]
>;
// 16-bit reads
-def VTX_READ_GLOBAL_16_cm : VTX_READ_16_cm <1,
- [(set i32:$dst_gpr, (az_extloadi16_global ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_16_cm : VTX_READ_16_cm <1,
+ [(set i32:$dst_gpr, (vtx_id1_az_extloadi16 ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads
-def VTX_READ_GLOBAL_32_cm : VTX_READ_32_cm <1,
- [(set i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_32_cm : VTX_READ_32_cm <1,
+ [(set i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 64-bit reads
-def VTX_READ_GLOBAL_64_cm : VTX_READ_64_cm <1,
- [(set v2i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_64_cm : VTX_READ_64_cm <1,
+ [(set v2i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 128-bit reads
-def VTX_READ_GLOBAL_128_cm : VTX_READ_128_cm <1,
- [(set v4i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_128_cm : VTX_READ_128_cm <1,
+ [(set v4i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 8-bit reads
-def VTX_READ_CONSTANT_8_cm : VTX_READ_8_cm <2,
- [(set i32:$dst_gpr, (az_extloadi8_constant ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_8_cm : VTX_READ_8_cm <2,
+ [(set i32:$dst_gpr, (vtx_id2_az_extloadi8 ADDRVTX_READ:$src_gpr))]
>;
// 16-bit reads
-def VTX_READ_CONSTANT_16_cm : VTX_READ_16_cm <2,
- [(set i32:$dst_gpr, (az_extloadi16_constant ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_16_cm : VTX_READ_16_cm <2,
+ [(set i32:$dst_gpr, (vtx_id2_az_extloadi16 ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads
-def VTX_READ_CONSTANT_32_cm : VTX_READ_32_cm <2,
- [(set i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_32_cm : VTX_READ_32_cm <2,
+ [(set i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
// 64-bit reads
-def VTX_READ_CONSTANT_64_cm : VTX_READ_64_cm <2,
- [(set v2i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_64_cm : VTX_READ_64_cm <2,
+ [(set v2i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
// 128-bit reads
-def VTX_READ_CONSTANT_128_cm : VTX_READ_128_cm <2,
- [(set v4i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_128_cm : VTX_READ_128_cm <2,
+ [(set v4i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
} // End isCayman
Modified: llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td?rev=274527&r1=274526&r2=274527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td Mon Jul 4 19:12:51 2016
@@ -235,53 +235,53 @@ def VTX_READ_PARAM_128_eg : VTX_READ_128
//===----------------------------------------------------------------------===//
// 8-bit reads
-def VTX_READ_GLOBAL_8_eg : VTX_READ_8_eg <1,
- [(set i32:$dst_gpr, (az_extloadi8_global ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_8_eg : VTX_READ_8_eg <1,
+ [(set i32:$dst_gpr, (vtx_id1_az_extloadi8 ADDRVTX_READ:$src_gpr))]
>;
// 16-bit reads
-def VTX_READ_GLOBAL_16_eg : VTX_READ_16_eg <1,
- [(set i32:$dst_gpr, (az_extloadi16_global ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_16_eg : VTX_READ_16_eg <1,
+ [(set i32:$dst_gpr, (vtx_id1_az_extloadi16 ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads
-def VTX_READ_GLOBAL_32_eg : VTX_READ_32_eg <1,
- [(set i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_32_eg : VTX_READ_32_eg <1,
+ [(set i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 64-bit reads
-def VTX_READ_GLOBAL_64_eg : VTX_READ_64_eg <1,
- [(set v2i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_64_eg : VTX_READ_64_eg <1,
+ [(set v2i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 128-bit reads
-def VTX_READ_GLOBAL_128_eg : VTX_READ_128_eg <1,
- [(set v4i32:$dst_gpr, (global_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID1_128_eg : VTX_READ_128_eg <1,
+ [(set v4i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
>;
// 8-bit reads
-def VTX_READ_CONSTANT_8_eg : VTX_READ_8_eg <2,
- [(set i32:$dst_gpr, (az_extloadi8_constant ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_8_eg : VTX_READ_8_eg <2,
+ [(set i32:$dst_gpr, (vtx_id2_az_extloadi8 ADDRVTX_READ:$src_gpr))]
>;
// 16-bit reads
-def VTX_READ_CONSTANT_16_eg : VTX_READ_16_eg <2,
- [(set i32:$dst_gpr, (az_extloadi16_constant ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_16_eg : VTX_READ_16_eg <2,
+ [(set i32:$dst_gpr, (vtx_id2_az_extloadi16 ADDRVTX_READ:$src_gpr))]
>;
// 32-bit reads
-def VTX_READ_CONSTANT_32_eg : VTX_READ_32_eg <2,
- [(set i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_32_eg : VTX_READ_32_eg <2,
+ [(set i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
// 64-bit reads
-def VTX_READ_CONSTANT_64_eg : VTX_READ_64_eg <2,
- [(set v2i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_64_eg : VTX_READ_64_eg <2,
+ [(set v2i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
// 128-bit reads
-def VTX_READ_CONSTANT_128_eg : VTX_READ_128_eg <2,
- [(set v4i32:$dst_gpr, (constant_load ADDRVTX_READ:$src_gpr))]
+def VTX_READ_ID2_128_eg : VTX_READ_128_eg <2,
+ [(set v4i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
>;
} // End Predicates = [isEG]
Modified: llvm/trunk/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600Instructions.td?rev=274527&r1=274526&r2=274527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/R600Instructions.td Mon Jul 4 19:12:51 2016
@@ -336,6 +336,31 @@ def load_param : LoadParamFrag<load>;
def load_param_exti8 : LoadParamFrag<az_extloadi8>;
def load_param_exti16 : LoadParamFrag<az_extloadi16>;
+class LoadVtxId1 <PatFrag load> : PatFrag <
+ (ops node:$ptr), (load node:$ptr), [{
+ const MemSDNode *LD = cast<MemSDNode>(N);
+ return LD->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS ||
+ (LD->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS &&
+ !isa<GlobalValue>(GetUnderlyingObject(
+ LD->getMemOperand()->getValue(), CurDAG->getDataLayout())));
+}]>;
+
+def vtx_id1_az_extloadi8 : LoadVtxId1 <az_extloadi8>;
+def vtx_id1_az_extloadi16 : LoadVtxId1 <az_extloadi16>;
+def vtx_id1_load : LoadVtxId1 <load>;
+
+class LoadVtxId2 <PatFrag load> : PatFrag <
+ (ops node:$ptr), (load node:$ptr), [{
+ const MemSDNode *LD = cast<MemSDNode>(N);
+ return LD->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS &&
+ isa<GlobalValue>(GetUnderlyingObject(
+ LD->getMemOperand()->getValue(), CurDAG->getDataLayout()));
+}]>;
+
+def vtx_id2_az_extloadi8 : LoadVtxId2 <az_extloadi8>;
+def vtx_id2_az_extloadi16 : LoadVtxId2 <az_extloadi16>;
+def vtx_id2_load : LoadVtxId2 <load>;
+
def isR600 : Predicate<"Subtarget->getGeneration() <= R600Subtarget::R700">;
def isR600toCayman
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