[llvm] r274417 - [SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.

[Marcin Koscielnicki via llvm-commits]

Author: koriakin
Date: Fri Jul  1 21:20:40 2016
New Revision: 274417

URL: http://llvm.org/viewvc/llvm-project?rev=274417&view=rev
Log:
[SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=274417&r1=274416&r2=274417&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Fri Jul  1 21:20:40 2016
@@ -4670,6 +4670,7 @@ const char *SystemZTargetLowering::getTa
     OPCODE(VISTR_CC);
     OPCODE(VSTRC_CC);
     OPCODE(VSTRCZ_CC);
+    OPCODE(TDC);
     OPCODE(ATOMIC_SWAPW);
     OPCODE(ATOMIC_LOADW_ADD);
     OPCODE(ATOMIC_LOADW_SUB);
@@ -4684,7 +4685,6 @@ const char *SystemZTargetLowering::getTa
     OPCODE(ATOMIC_CMP_SWAPW);
     OPCODE(LRV);
     OPCODE(STRV);
-    OPCODE(TDC);
     OPCODE(PREFETCH);
   }
   return nullptr;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h?rev=274417&r1=274416&r2=274417&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h Fri Jul  1 21:20:40 2016
@@ -278,6 +278,12 @@ enum NodeType : unsigned {
   VSTRC_CC,
   VSTRCZ_CC,
 
+  // Test Data Class.
+  //
+  // Operand 0: the value to test
+  // Operand 1: the bit mask
+  TDC,
+
   // Wrappers around the inner loop of an 8- or 16-bit ATOMIC_SWAP or
   // ATOMIC_LOAD_<op>.
   //
@@ -324,12 +330,6 @@ enum NodeType : unsigned {
   // Operand 2: the type of store (i16, i32, i64)
   STRV,
 
-  // Test Data Class.
-  //
-  // Operand 0: the value to test
-  // Operand 1: the bit mask
-  TDC,
-
   // Prefetch from the second operand using the 4-bit control code in
   // the first operand.  The code is 1 for a load prefetch and 2 for
   // a store prefetch.