[llvm] r274412 - Add RenderScript ArchType
Pirama Arumuga Nainar via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 1 17:37:07 PDT 2016
Hi Michael, Yes I should have realized this before I submitted the
changes. I apologize for the buildbot failures. Hopefully things should
go green now.
Thanks,
-Pirama
On Fri, Jul 1, 2016 at 5:34 PM, Michael Kuperstein <mkuper at google.com>
wrote:
> Hi Pirama,
>
> Next time you have an llvm change and a clang change that depends on it,
> please commit the llvm part *first*. Otherwise it causes widespread
> breakage in the buildbots, since the top-of-trunk clang + llvm combination
> no longer builds.
>
> Thanks,
> Michael
>
> On Fri, Jul 1, 2016 at 5:23 PM, Pirama Arumuga Nainar via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: pirama
>> Date: Fri Jul 1 19:23:09 2016
>> New Revision: 274412
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=274412&view=rev
>> Log:
>> Add RenderScript ArchType
>>
>> Summary:
>> Add renderscript32 and renderscript64 ArchTypes. This is to configure
>> the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
>> size and alignment. 64-bit RenderScript is the same as AArch64, but is
>> added here for completeness.
>>
>> Reviewers: echristo, rsmith
>>
>> Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits,
>> srhines
>>
>> Differential Revision: http://reviews.llvm.org/D21333
>>
>> Modified:
>> llvm/trunk/include/llvm/ADT/Triple.h
>> llvm/trunk/lib/Support/Triple.cpp
>>
>> Modified: llvm/trunk/include/llvm/ADT/Triple.h
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=274412&r1=274411&r2=274412&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/include/llvm/ADT/Triple.h (original)
>> +++ llvm/trunk/include/llvm/ADT/Triple.h Fri Jul 1 19:23:09 2016
>> @@ -46,50 +46,52 @@ public:
>> enum ArchType {
>> UnknownArch,
>>
>> - arm, // ARM (little endian): arm, armv.*, xscale
>> - armeb, // ARM (big endian): armeb
>> - aarch64, // AArch64 (little endian): aarch64
>> - aarch64_be, // AArch64 (big endian): aarch64_be
>> - avr, // AVR: Atmel AVR microcontroller
>> - bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
>> - bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
>> - hexagon, // Hexagon: hexagon
>> - mips, // MIPS: mips, mipsallegrex
>> - mipsel, // MIPSEL: mipsel, mipsallegrexel
>> - mips64, // MIPS64: mips64
>> - mips64el, // MIPS64EL: mips64el
>> - msp430, // MSP430: msp430
>> - ppc, // PPC: powerpc
>> - ppc64, // PPC64: powerpc64, ppu
>> - ppc64le, // PPC64LE: powerpc64le
>> - r600, // R600: AMD GPUs HD2XXX - HD6XXX
>> - amdgcn, // AMDGCN: AMD GCN GPUs
>> - sparc, // Sparc: sparc
>> - sparcv9, // Sparcv9: Sparcv9
>> - sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU
>> variant
>> - systemz, // SystemZ: s390x
>> - tce, // TCE (http://tce.cs.tut.fi/): tce
>> - thumb, // Thumb (little endian): thumb, thumbv.*
>> - thumbeb, // Thumb (big endian): thumbeb
>> - x86, // X86: i[3-9]86
>> - x86_64, // X86-64: amd64, x86_64
>> - xcore, // XCore: xcore
>> - nvptx, // NVPTX: 32-bit
>> - nvptx64, // NVPTX: 64-bit
>> - le32, // le32: generic little-endian 32-bit CPU (PNaCl)
>> - le64, // le64: generic little-endian 64-bit CPU (PNaCl)
>> - amdil, // AMDIL
>> - amdil64, // AMDIL with 64-bit pointers
>> - hsail, // AMD HSAIL
>> - hsail64, // AMD HSAIL with 64-bit pointers
>> - spir, // SPIR: standard portable IR for OpenCL 32-bit version
>> - spir64, // SPIR: standard portable IR for OpenCL 64-bit version
>> - kalimba, // Kalimba: generic kalimba
>> - shave, // SHAVE: Movidius vector VLIW processors
>> - lanai, // Lanai: Lanai 32-bit
>> - wasm32, // WebAssembly with 32-bit pointers
>> - wasm64, // WebAssembly with 64-bit pointers
>> - LastArchType = wasm64
>> + arm, // ARM (little endian): arm, armv.*, xscale
>> + armeb, // ARM (big endian): armeb
>> + aarch64, // AArch64 (little endian): aarch64
>> + aarch64_be, // AArch64 (big endian): aarch64_be
>> + avr, // AVR: Atmel AVR microcontroller
>> + bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
>> + bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
>> + hexagon, // Hexagon: hexagon
>> + mips, // MIPS: mips, mipsallegrex
>> + mipsel, // MIPSEL: mipsel, mipsallegrexel
>> + mips64, // MIPS64: mips64
>> + mips64el, // MIPS64EL: mips64el
>> + msp430, // MSP430: msp430
>> + ppc, // PPC: powerpc
>> + ppc64, // PPC64: powerpc64, ppu
>> + ppc64le, // PPC64LE: powerpc64le
>> + r600, // R600: AMD GPUs HD2XXX - HD6XXX
>> + amdgcn, // AMDGCN: AMD GCN GPUs
>> + sparc, // Sparc: sparc
>> + sparcv9, // Sparcv9: Sparcv9
>> + sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a
>> CPU variant
>> + systemz, // SystemZ: s390x
>> + tce, // TCE (http://tce.cs.tut.fi/): tce
>> + thumb, // Thumb (little endian): thumb, thumbv.*
>> + thumbeb, // Thumb (big endian): thumbeb
>> + x86, // X86: i[3-9]86
>> + x86_64, // X86-64: amd64, x86_64
>> + xcore, // XCore: xcore
>> + nvptx, // NVPTX: 32-bit
>> + nvptx64, // NVPTX: 64-bit
>> + le32, // le32: generic little-endian 32-bit CPU (PNaCl)
>> + le64, // le64: generic little-endian 64-bit CPU (PNaCl)
>> + amdil, // AMDIL
>> + amdil64, // AMDIL with 64-bit pointers
>> + hsail, // AMD HSAIL
>> + hsail64, // AMD HSAIL with 64-bit pointers
>> + spir, // SPIR: standard portable IR for OpenCL 32-bit
>> version
>> + spir64, // SPIR: standard portable IR for OpenCL 64-bit
>> version
>> + kalimba, // Kalimba: generic kalimba
>> + shave, // SHAVE: Movidius vector VLIW processors
>> + lanai, // Lanai: Lanai 32-bit
>> + wasm32, // WebAssembly with 32-bit pointers
>> + wasm64, // WebAssembly with 64-bit pointers
>> + renderscript32, // 32-bit RenderScript
>> + renderscript64, // 64-bit RenderScript
>> + LastArchType = renderscript64
>> };
>> enum SubArchType {
>> NoSubArch,
>>
>> Modified: llvm/trunk/lib/Support/Triple.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=274412&r1=274411&r2=274412&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Support/Triple.cpp (original)
>> +++ llvm/trunk/lib/Support/Triple.cpp Fri Jul 1 19:23:09 2016
>> @@ -19,51 +19,53 @@ using namespace llvm;
>>
>> const char *Triple::getArchTypeName(ArchType Kind) {
>> switch (Kind) {
>> - case UnknownArch: return "unknown";
>> + case UnknownArch: return "unknown";
>>
>> - case aarch64: return "aarch64";
>> - case aarch64_be: return "aarch64_be";
>> - case arm: return "arm";
>> - case armeb: return "armeb";
>> - case avr: return "avr";
>> - case bpfel: return "bpfel";
>> - case bpfeb: return "bpfeb";
>> - case hexagon: return "hexagon";
>> - case mips: return "mips";
>> - case mipsel: return "mipsel";
>> - case mips64: return "mips64";
>> - case mips64el: return "mips64el";
>> - case msp430: return "msp430";
>> - case ppc64: return "powerpc64";
>> - case ppc64le: return "powerpc64le";
>> - case ppc: return "powerpc";
>> - case r600: return "r600";
>> - case amdgcn: return "amdgcn";
>> - case sparc: return "sparc";
>> - case sparcv9: return "sparcv9";
>> - case sparcel: return "sparcel";
>> - case systemz: return "s390x";
>> - case tce: return "tce";
>> - case thumb: return "thumb";
>> - case thumbeb: return "thumbeb";
>> - case x86: return "i386";
>> - case x86_64: return "x86_64";
>> - case xcore: return "xcore";
>> - case nvptx: return "nvptx";
>> - case nvptx64: return "nvptx64";
>> - case le32: return "le32";
>> - case le64: return "le64";
>> - case amdil: return "amdil";
>> - case amdil64: return "amdil64";
>> - case hsail: return "hsail";
>> - case hsail64: return "hsail64";
>> - case spir: return "spir";
>> - case spir64: return "spir64";
>> - case kalimba: return "kalimba";
>> - case lanai: return "lanai";
>> - case shave: return "shave";
>> - case wasm32: return "wasm32";
>> - case wasm64: return "wasm64";
>> + case aarch64: return "aarch64";
>> + case aarch64_be: return "aarch64_be";
>> + case arm: return "arm";
>> + case armeb: return "armeb";
>> + case avr: return "avr";
>> + case bpfel: return "bpfel";
>> + case bpfeb: return "bpfeb";
>> + case hexagon: return "hexagon";
>> + case mips: return "mips";
>> + case mipsel: return "mipsel";
>> + case mips64: return "mips64";
>> + case mips64el: return "mips64el";
>> + case msp430: return "msp430";
>> + case ppc64: return "powerpc64";
>> + case ppc64le: return "powerpc64le";
>> + case ppc: return "powerpc";
>> + case r600: return "r600";
>> + case amdgcn: return "amdgcn";
>> + case sparc: return "sparc";
>> + case sparcv9: return "sparcv9";
>> + case sparcel: return "sparcel";
>> + case systemz: return "s390x";
>> + case tce: return "tce";
>> + case thumb: return "thumb";
>> + case thumbeb: return "thumbeb";
>> + case x86: return "i386";
>> + case x86_64: return "x86_64";
>> + case xcore: return "xcore";
>> + case nvptx: return "nvptx";
>> + case nvptx64: return "nvptx64";
>> + case le32: return "le32";
>> + case le64: return "le64";
>> + case amdil: return "amdil";
>> + case amdil64: return "amdil64";
>> + case hsail: return "hsail";
>> + case hsail64: return "hsail64";
>> + case spir: return "spir";
>> + case spir64: return "spir64";
>> + case kalimba: return "kalimba";
>> + case lanai: return "lanai";
>> + case shave: return "shave";
>> + case wasm32: return "wasm32";
>> + case wasm64: return "wasm64";
>> + case renderscript32: return "renderscript32";
>> + case renderscript64: return "renderscript64";
>> }
>>
>> llvm_unreachable("Invalid ArchType!");
>> @@ -280,6 +282,8 @@ Triple::ArchType Triple::getArchTypeForL
>> .Case("shave", shave)
>> .Case("wasm32", wasm32)
>> .Case("wasm64", wasm64)
>> + .Case("renderscript32", renderscript32)
>> + .Case("renderscript64", renderscript64)
>> .Default(UnknownArch);
>> }
>>
>> @@ -389,6 +393,8 @@ static Triple::ArchType parseArch(String
>> .Case("shave", Triple::shave)
>> .Case("wasm32", Triple::wasm32)
>> .Case("wasm64", Triple::wasm64)
>> + .Case("renderscript32", Triple::renderscript32)
>> + .Case("renderscript64", Triple::renderscript64)
>> .Default(Triple::UnknownArch);
>>
>> // Some architectures require special parsing logic just to compute the
>> @@ -594,6 +600,8 @@ static Triple::ObjectFormatType getDefau
>> case Triple::nvptx64:
>> case Triple::ppc64le:
>> case Triple::r600:
>> + case Triple::renderscript32:
>> + case Triple::renderscript64:
>> case Triple::shave:
>> case Triple::sparc:
>> case Triple::sparcel:
>> @@ -1135,6 +1143,7 @@ static unsigned getArchPointerBitWidth(l
>> case llvm::Triple::lanai:
>> case llvm::Triple::shave:
>> case llvm::Triple::wasm32:
>> + case llvm::Triple::renderscript32:
>> return 32;
>>
>> case llvm::Triple::aarch64:
>> @@ -1155,6 +1164,7 @@ static unsigned getArchPointerBitWidth(l
>> case llvm::Triple::hsail64:
>> case llvm::Triple::spir64:
>> case llvm::Triple::wasm64:
>> + case llvm::Triple::renderscript64:
>> return 64;
>> }
>> llvm_unreachable("Invalid architecture value");
>> @@ -1209,22 +1219,24 @@ Triple Triple::get32BitArchVariant() con
>> case Triple::lanai:
>> case Triple::shave:
>> case Triple::wasm32:
>> + case Triple::renderscript32:
>> // Already 32-bit.
>> break;
>>
>> - case Triple::aarch64: T.setArch(Triple::arm); break;
>> - case Triple::aarch64_be: T.setArch(Triple::armeb); break;
>> - case Triple::le64: T.setArch(Triple::le32); break;
>> - case Triple::mips64: T.setArch(Triple::mips); break;
>> - case Triple::mips64el: T.setArch(Triple::mipsel); break;
>> - case Triple::nvptx64: T.setArch(Triple::nvptx); break;
>> - case Triple::ppc64: T.setArch(Triple::ppc); break;
>> - case Triple::sparcv9: T.setArch(Triple::sparc); break;
>> - case Triple::x86_64: T.setArch(Triple::x86); break;
>> - case Triple::amdil64: T.setArch(Triple::amdil); break;
>> - case Triple::hsail64: T.setArch(Triple::hsail); break;
>> - case Triple::spir64: T.setArch(Triple::spir); break;
>> - case Triple::wasm64: T.setArch(Triple::wasm32); break;
>> + case Triple::aarch64: T.setArch(Triple::arm); break;
>> + case Triple::aarch64_be: T.setArch(Triple::armeb); break;
>> + case Triple::le64: T.setArch(Triple::le32); break;
>> + case Triple::mips64: T.setArch(Triple::mips); break;
>> + case Triple::mips64el: T.setArch(Triple::mipsel); break;
>> + case Triple::nvptx64: T.setArch(Triple::nvptx); break;
>> + case Triple::ppc64: T.setArch(Triple::ppc); break;
>> + case Triple::sparcv9: T.setArch(Triple::sparc); break;
>> + case Triple::x86_64: T.setArch(Triple::x86); break;
>> + case Triple::amdil64: T.setArch(Triple::amdil); break;
>> + case Triple::hsail64: T.setArch(Triple::hsail); break;
>> + case Triple::spir64: T.setArch(Triple::spir); break;
>> + case Triple::wasm64: T.setArch(Triple::wasm32); break;
>> + case Triple::renderscript64: T.setArch(Triple::renderscript32); break;
>> }
>> return T;
>> }
>> @@ -1264,24 +1276,26 @@ Triple Triple::get64BitArchVariant() con
>> case Triple::systemz:
>> case Triple::x86_64:
>> case Triple::wasm64:
>> + case Triple::renderscript64:
>> // Already 64-bit.
>> break;
>>
>> - case Triple::arm: T.setArch(Triple::aarch64); break;
>> - case Triple::armeb: T.setArch(Triple::aarch64_be); break;
>> - case Triple::le32: T.setArch(Triple::le64); break;
>> - case Triple::mips: T.setArch(Triple::mips64); break;
>> - case Triple::mipsel: T.setArch(Triple::mips64el); break;
>> - case Triple::nvptx: T.setArch(Triple::nvptx64); break;
>> - case Triple::ppc: T.setArch(Triple::ppc64); break;
>> - case Triple::sparc: T.setArch(Triple::sparcv9); break;
>> - case Triple::x86: T.setArch(Triple::x86_64); break;
>> - case Triple::amdil: T.setArch(Triple::amdil64); break;
>> - case Triple::hsail: T.setArch(Triple::hsail64); break;
>> - case Triple::spir: T.setArch(Triple::spir64); break;
>> - case Triple::thumb: T.setArch(Triple::aarch64); break;
>> - case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;
>> - case Triple::wasm32: T.setArch(Triple::wasm64); break;
>> + case Triple::arm: T.setArch(Triple::aarch64); break;
>> + case Triple::armeb: T.setArch(Triple::aarch64_be); break;
>> + case Triple::le32: T.setArch(Triple::le64); break;
>> + case Triple::mips: T.setArch(Triple::mips64); break;
>> + case Triple::mipsel: T.setArch(Triple::mips64el); break;
>> + case Triple::nvptx: T.setArch(Triple::nvptx64); break;
>> + case Triple::ppc: T.setArch(Triple::ppc64); break;
>> + case Triple::sparc: T.setArch(Triple::sparcv9); break;
>> + case Triple::x86: T.setArch(Triple::x86_64); break;
>> + case Triple::amdil: T.setArch(Triple::amdil64); break;
>> + case Triple::hsail: T.setArch(Triple::hsail64); break;
>> + case Triple::spir: T.setArch(Triple::spir64); break;
>> + case Triple::thumb: T.setArch(Triple::aarch64); break;
>> + case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;
>> + case Triple::wasm32: T.setArch(Triple::wasm64); break;
>> + case Triple::renderscript32: T.setArch(Triple::renderscript64);
>> break;
>> }
>> return T;
>> }
>> @@ -1315,6 +1329,8 @@ Triple Triple::getBigEndianArchVariant()
>> case Triple::x86:
>> case Triple::x86_64:
>> case Triple::xcore:
>> + case Triple::renderscript32:
>> + case Triple::renderscript64:
>>
>> // ARM is intentionally unsupported here, changing the architecture
>> would
>> // drop any arch suffixes.
>> @@ -1399,6 +1415,8 @@ bool Triple::isLittleEndian() const {
>> case Triple::x86:
>> case Triple::x86_64:
>> case Triple::xcore:
>> + case Triple::renderscript32:
>> + case Triple::renderscript64:
>> return true;
>> default:
>> return false;
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at lists.llvm.org
>> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>>
>
>
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