[PATCH] D21826: AArch64: Change modeling of zero cycle zeroing.

[Matthias Braun via llvm-commits]

MatzeB updated this revision to Diff 62281.
MatzeB added a comment.

Fix register translation, be "less smart" in the emit code to make the ZCZ/NonZCZ cases look more idiomatic/symmetric.


Repository:
  rL LLVM

http://reviews.llvm.org/D21826

Files:
  lib/Target/AArch64/AArch64AsmPrinter.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
  test/CodeGen/AArch64/fp-cond-sel.ll

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