[PATCH] D21802: Ensure all uses of permute instruction feed vector stores

Bill Schmidt via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 29 10:48:01 PDT 2016


wschmidt added a comment.

In http://reviews.llvm.org/D21802#470163, @kbarton wrote:

> In http://reviews.llvm.org/D21802#469887, @wschmidt wrote:
>
> > The patch LGTM.  One question: Did you check for the reverse situation?  Can we have a swap that is fed by more than one instruction, where one is not a load, or is that already handled in the code?  I realize this may not come up in practice if we don't have a machine sinking pass.
>
>
> This is already handled in the code. If the register defined by a swapping load is used in something other than a swapping load/swapping store, then the web is rejected.  Unless there is another case outside of this that I'm not seeing....


Great, thanks.  That was my only concern.


http://reviews.llvm.org/D21802





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