[llvm] r274024 - [X86] Make WRPKRU/RDPKRU pass -verify-machineinstrs

David Majnemer via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 28 09:04:46 PDT 2016


Author: majnemer
Date: Tue Jun 28 11:04:46 2016
New Revision: 274024

URL: http://llvm.org/viewvc/llvm-project?rev=274024&view=rev
Log:
[X86] Make WRPKRU/RDPKRU pass -verify-machineinstrs

The original implementation attempted to zero registers using
XOR %foo, %foo.  This is problematic because it constitutes a
read-modify-write of a register which might not be defined.

Instead, use MOV32r0 to avoid these problems; expandPostRAPseudo does
the right thing here.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/pku.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=274024&r1=274023&r2=274024&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jun 28 11:04:46 2016
@@ -22547,13 +22547,11 @@ static MachineBasicBlock *emitWRPKRU(Mac
   BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EAX)
                            .addReg(MI->getOperand(0).getReg());
   // insert zero to ECX
-  BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
-                           .addReg(X86::ECX)
-                           .addReg(X86::ECX);
+  BuildMI(*BB, MI, dl, TII->get(X86::MOV32r0), X86::ECX);
+
   // insert zero to EDX
-  BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::EDX)
-                           .addReg(X86::EDX)
-                           .addReg(X86::EDX);
+  BuildMI(*BB, MI, dl, TII->get(X86::MOV32r0), X86::EDX);
+
   // insert WRPKRU instruction
   BuildMI(*BB, MI, dl, TII->get(X86::WRPKRUr));
 
@@ -22567,9 +22565,8 @@ static MachineBasicBlock *emitRDPKRU(Mac
   const TargetInstrInfo *TII = Subtarget.getInstrInfo();
 
   // insert zero to ECX
-  BuildMI(*BB, MI, dl, TII->get(X86::XOR32rr), X86::ECX)
-                           .addReg(X86::ECX)
-                           .addReg(X86::ECX);
+  BuildMI(*BB, MI, dl, TII->get(X86::MOV32r0), X86::ECX);
+
   // insert RDPKRU instruction
   BuildMI(*BB, MI, dl, TII->get(X86::RDPKRUr));
   BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), MI->getOperand(0).getReg())

Modified: llvm/trunk/test/CodeGen/X86/pku.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pku.ll?rev=274024&r1=274023&r2=274024&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pku.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pku.ll Tue Jun 28 11:04:46 2016
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s
 declare i32 @llvm.x86.rdpkru()
 declare void @llvm.x86.wrpkru(i32)
 




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