[PATCH] D17284: TableGen: Constrain inputs of reg_sequence to be same type
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 28 07:44:39 PDT 2016
ab added a subscriber: ab.
ab added a comment.
No objection; looks like AMDGPU is the only user of REG_SEQUENCE in patterns ;)
I think the various ARM DAGToDAG also all use the same type.
================
Comment at: utils/TableGen/CodeGenDAGPatterns.cpp:1887
@@ +1886,3 @@
+ if (I > 1) {
+ assert(getChild(I)->getNumTypes() == 1 && "FIXME: Unhandled");
+ MadeChange |= getChild(I)->UpdateNodeType(0, getChild(1)->getExtType(0), TP);
----------------
TP.error() and return false?
Move this out of the if(I>1) so that it also checks the first child?
http://reviews.llvm.org/D17284
More information about the llvm-commits
mailing list