[PATCH] D21774: [X86] Transform setcc + movzbl into xorl + setcc
Michael Kuperstein via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 27 16:50:26 PDT 2016
mkuper created this revision.
mkuper added reviewers: DavidKreitzer, delena, hansw, qcolombet, RKSimon, sanjoy, davidxl.
mkuper added a subscriber: llvm-commits.
xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. It also encodes one byte smaller. llvm.org/PR28146 and the other associated PRs have more details on this.
Unfortunately, this can not be handled in DAG ISel, because of how X86 SETCC is modeled. And changing the way SETCC is modeled does not seem too attractive. So, we need to clean this up post-ISel. Dave Kreitzer suggested using pseudos to represent a zexted setcc, which is cleaner in some sense, but dirtier in others, and on the balance, I think I prefer this patch. Dave, if you (or anyone else) feel strongly that we should be using pseudos - or some other solution - instead, we can continue the discussion here.
Note that this is not a win in 100% of the cases - for example, some pcmpstri test cases below get pessimized. This happens because the register allocator is over-constrained due to the extended value being forced into %eax. So we should not see this sort of thing inside hot loops. Suggestions on how to resolve this are welcome, although I don't believe that should block this patch.
http://reviews.llvm.org/D21774
Files:
lib/Target/X86/CMakeLists.txt
lib/Target/X86/X86.h
lib/Target/X86/X86FixupSetCC.cpp
lib/Target/X86/X86TargetMachine.cpp
test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
test/CodeGen/X86/avx-intrinsics-fast-isel.ll
test/CodeGen/X86/avx-intrinsics-x86.ll
test/CodeGen/X86/avx512-cmp.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/bmi.ll
test/CodeGen/X86/cmov.ll
test/CodeGen/X86/cmp.ll
test/CodeGen/X86/cmpxchg-i1.ll
test/CodeGen/X86/cmpxchg-i128-i1.ll
test/CodeGen/X86/ctpop-combine.ll
test/CodeGen/X86/fp128-cast.ll
test/CodeGen/X86/fp128-compare.ll
test/CodeGen/X86/mcinst-lowering.ll
test/CodeGen/X86/return-ext.ll
test/CodeGen/X86/setcc-narrowing.ll
test/CodeGen/X86/setcc.ll
test/CodeGen/X86/sse-intrinsics-fast-isel.ll
test/CodeGen/X86/sse-intrinsics-x86.ll
test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
test/CodeGen/X86/sse2-intrinsics-x86.ll
test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
test/CodeGen/X86/sse41-intrinsics-x86.ll
test/CodeGen/X86/sse41.ll
test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
test/CodeGen/X86/sse42-intrinsics-x86.ll
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