[llvm] r273887 - [SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)

[Zhan Jun Liau via llvm-commits]

Author: zhanjunl
Date: Mon Jun 27 10:55:30 2016
New Revision: 273887

URL: http://llvm.org/viewvc/llvm-project?rev=273887&view=rev
Log:
[SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)

Summary:
Created a pattern to match 64-bit mode (and (xor x, -1), y)
to a shorter sequence of instructions.

Before the change, the canonical form is translated to:
        xihf    %r3, 4294967295
        xilf    %r3, 4294967295
        ngr     %r2, %r3

After the change, the canonical form is translated to:
        ngr     %r3, %r2
        xgr     %r2, %r3

Reviewers: zhanjunl, uweigand

Subscribers: llvm-commits

Author: assem

Committing on behalf of Assem.

Differential Revision: http://reviews.llvm.org/D21693

Added:
    llvm/trunk/test/CodeGen/SystemZ/and-xor-01.ll
Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=273887&r1=273886&r2=273887&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Mon Jun 27 10:55:30 2016
@@ -1680,6 +1680,11 @@ def : Pat<(sra (shl (i64 (anyext (i32 (z
                (i32 63)),
           (Select64 (LGHI -1), (LGHI 0), imm32zx4:$valid, imm32zx4:$cc)>;
 
+// Avoid generating 2 XOR instructions. (xor (and x, y), y) is
+// equivalent to (and (xor x, -1), y)
+def : Pat<(and (xor GR64:$x, (i64 -1)), GR64:$y),
+                          (XGR GR64:$y, (NGR GR64:$y, GR64:$x))>;
+
 // Peepholes for turning scalar operations into block operations.
 defm : BlockLoadStore<anyextloadi8, i32, MVCSequence, NCSequence, OCSequence,
                       XCSequence, 1>;

Added: llvm/trunk/test/CodeGen/SystemZ/and-xor-01.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/and-xor-01.ll?rev=273887&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/and-xor-01.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/and-xor-01.ll Mon Jun 27 10:55:30 2016
@@ -0,0 +1,14 @@
+; Testing peephole for generating shorter code for (and (xor b, -1), a)
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+define i64 @f1(i64 %a, i64 %b) {
+; CHECK-LABEL: f1:
+; CHECK: ngr %r3, %r2
+; CHECK: xgr %r2, %r3
+; CHECK: br %r14
+  %neg = xor i64 %b, -1
+  %and = and i64 %neg, %a
+  ret i64 %and
+}
+