[PATCH] D21685: [ARM] Do not test for CPUs, use SubtargetFeatures (Part 2). NFCI
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 24 14:28:45 PDT 2016
echristo added a comment.
One inline comment/question. If the answer is "no ideas come to mind" then feel free to commit from my perspective.
-eric
================
Comment at: lib/Target/ARM/ARMSubtarget.h:61
@@ +60,3 @@
+ /// What kind of timing do load multiple/store multiple instructions have.
+ enum ARMLdStMultipleTiming {
+ /// Can load/store 2 registers/cycle.
----------------
This feels a little awkward, but I guess not terrible. I'm not sure I like it more than just having it all explicit in routines. Nothing binding here, just commentary of "is there something better here?"
http://reviews.llvm.org/D21685
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