[llvm] r273707 - Revert r273545, "[IfConversion] Bugfix: Don't use undef flag while adding use operands."
Peter Collingbourne via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 24 11:57:30 PDT 2016
Author: pcc
Date: Fri Jun 24 13:57:29 2016
New Revision: 273707
URL: http://llvm.org/viewvc/llvm-project?rev=273707&view=rev
Log:
Revert r273545, "[IfConversion] Bugfix: Don't use undef flag while adding use operands."
as it caused PR28295.
Modified:
llvm/trunk/lib/CodeGen/IfConversion.cpp
Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=273707&r1=273706&r2=273707&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Fri Jun 24 13:57:29 2016
@@ -1046,19 +1046,8 @@ void IfConverter::RemoveExtraEdges(BBInf
}
/// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
-/// values defined in MI which are also live/used by MI.
+/// values defined in MI which are not live/used by MI.
static void UpdatePredRedefs(MachineInstr &MI, LivePhysRegs &Redefs) {
- const TargetRegisterInfo *TRI = MI.getParent()->getParent()
- ->getSubtarget().getRegisterInfo();
-
- // Before stepping forward past MI, remember which regs were live
- // before MI. This is needed to set the Undef flag only when reg is
- // dead.
- SparseSet<unsigned> LiveBeforeMI;
- LiveBeforeMI.setUniverse(TRI->getNumRegs());
- for (auto &Reg : Redefs)
- LiveBeforeMI.insert(Reg);
-
SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
Redefs.stepForward(MI, Clobbers);
@@ -1072,8 +1061,7 @@ static void UpdatePredRedefs(MachineInst
if (Op.isRegMask()) {
// First handle regmasks. They clobber any entries in the mask which
// means that we need a def for those registers.
- if (LiveBeforeMI.count(Reg.first))
- MIB.addReg(Reg.first, RegState::Implicit);
+ MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
// We also need to add an implicit def of this register for the later
// use to read from.
@@ -1090,8 +1078,7 @@ static void UpdatePredRedefs(MachineInst
if (Redefs.contains(Op.getReg()))
Op.setIsDead(false);
}
- if (LiveBeforeMI.count(Reg.first))
- MIB.addReg(Reg.first, RegState::Implicit);
+ MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
}
}
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