[PATCH] D21633: AMDGPU/R600: Fix GlobalValue regressions.
Jan Vesely via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 23 16:12:53 PDT 2016
jvesely updated the summary for this revision.
jvesely updated this revision to Diff 61739.
jvesely added a comment.
remove double semicolon
Repository:
rL LLVM
http://reviews.llvm.org/D21633
Files:
lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
Index: lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
===================================================================
--- lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
@@ -163,15 +163,14 @@
}
if (MO.isExpr()) {
- const MCSymbolRefExpr *Expr = cast<MCSymbolRefExpr>(MO.getExpr());
// We put rodata at the end of code section, then map the entire
// code secetion as vtx buf. Thus the section relative address is the
// correct one.
// Each R600 literal instruction has two operands
// We can't easily get the order of the current one, so compare against
// the first one and adjust offset.
const unsigned offset = (&MO == &MI.getOperand(0)) ? 0 : 4;
- Fixups.push_back(MCFixup::create(offset, Expr, FK_SecRel_4, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(offset, MO.getExpr(), FK_SecRel_4, MI.getLoc()));
return 0;
}
Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
===================================================================
--- lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -49,6 +49,8 @@
default: break;
case FK_PCRel_4:
return ELF::R_AMDGPU_REL32;
+ case FK_SecRel_4:
+ return ELF::R_AMDGPU_NONE;
}
llvm_unreachable("unhandled relocation type");
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