[PATCH] D19401: MachineScheduler: Fully compare top/bottom candidates

[Matthias Braun via llvm-commits]

MatzeB updated this revision to Diff 61631.
MatzeB added a comment.

Tweaked the heuristic to get the reg-usage.ll test under control that Tom provided: The problem exposed by that case was in situations where both the top and bottom boundary only had pressure increasing choices available. Comparing the magnitude and then schedule some top, some bottom nodes was a bad idea:
In some situations we would schedule a top node early (because it happens to increase the pressure least accross both boundaries) only to find out a few nodes later that it would have decreased the pressure on the bottom. I tweaked the heuristic to always pick a bottom node in cases where all available choices in top+bottom increase register pressure.

In reg-usage.ll I see no regression in NumVgprs anymore now. There is still a 38 -> 46 Regression for SGprs which I will investigate, but it would probably be worth to re-run the benchmarks with this updated version.


Repository:
  rL LLVM

http://reviews.llvm.org/D19401

Files:
  include/llvm/CodeGen/MachineScheduler.h
  lib/CodeGen/MachineScheduler.cpp
  test/CodeGen/AArch64/arm64-convert-v4f64.ll
  test/CodeGen/AArch64/bitreverse.ll
  test/CodeGen/AArch64/cxx-tlscc.ll
  test/CodeGen/AArch64/vcvt-oversize.ll
  test/CodeGen/AArch64/vector-fcopysign.ll
  test/CodeGen/AMDGPU/and.ll
  test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/ds_read2_offset_order.ll
  test/CodeGen/AMDGPU/ds_read2st64.ll
  test/CodeGen/AMDGPU/fneg-fabs.f64.ll
  test/CodeGen/AMDGPU/insert_vector_elt.ll
  test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
  test/CodeGen/AMDGPU/local-memory-two-objects.ll
  test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
  test/CodeGen/AMDGPU/sra.ll
  test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
  test/CodeGen/PowerPC/ppc64-byval-align.ll

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