[PATCH] D21615: [inlineasm][mips] Propagate operand constraints to the backend

Simon Dardis via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 22 12:21:20 PDT 2016


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For MIPSR6, some instructions had their offsets reduced to 9 bits from
16 bits such as ll/sc. This becomes problematic when using inline assembly
to perform atomic operations, as an offset can generated that is too big to
encode in the instruction. Since SelectionDAGISel throws away some
constraint information, a memory operand cannot be verified as safe.

By propagating the constraints all the way to the backend, targets can
enforce memory operands of inline assembly to conform to their constraints.

Repository:
  rL LLVM

http://reviews.llvm.org/D21615

Files:
  lib/CodeGen/MachineInstr.cpp
  lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  lib/Target/Mips/MipsSERegisterInfo.cpp
  test/CodeGen/Mips/inlineasm-constraint_ZC_2.ll

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