[PATCH] D21571: Avoid generating indexed vector instructions for Exynos
Abderrazek Zaafrani via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 21 15:06:19 PDT 2016
az created this revision.
az added a reviewer: evandro.
az added a subscriber: llvm-commits.
Avoid generating indexed vector instructions for Exynos. This is needed for fmla/fmls/fmul/fmulx.
For example, the instruction fmla v0.4s, v1.4s, v2.s[1] is less efficient than the instructions dup v2.4s, v2.s[1] ; fmla v0.4s, v1.4s, v2.4s
http://reviews.llvm.org/D21571
Files:
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
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