[llvm] r273318 - AMDGPU: Remove gcc builtin names from workitem intrinsics
Jan Vesely via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 21 13:46:23 PDT 2016
Author: jvesely
Date: Tue Jun 21 15:46:22 2016
New Revision: 273318
URL: http://llvm.org/viewvc/llvm-project?rev=273318&view=rev
Log:
AMDGPU: Remove gcc builtin names from workitem intrinsics
We'll need to emit these manually in clang to add range metadata
Reviewers: arsenm
Differential Revision: http://reviews.llvm.org/D20691
Modified:
llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td
Modified: llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td?rev=273318&r1=273317&r2=273318&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td Tue Jun 21 15:46:22 2016
@@ -11,28 +11,37 @@
//
//===----------------------------------------------------------------------===//
-class AMDGPUReadPreloadRegisterIntrinsic<string name>
- : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>,
- GCCBuiltin<name>;
+class AMDGPUReadPreloadRegisterIntrinsic
+ : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
+
+class AMDGPUReadPreloadRegisterIntrinsicNamed<string name>
+ : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, GCCBuiltin<name>;
let TargetPrefix = "r600" in {
-multiclass AMDGPUReadPreloadRegisterIntrinsic_xyz<string prefix> {
- def _x : AMDGPUReadPreloadRegisterIntrinsic<!strconcat(prefix, "_x")>;
- def _y : AMDGPUReadPreloadRegisterIntrinsic<!strconcat(prefix, "_y")>;
- def _z : AMDGPUReadPreloadRegisterIntrinsic<!strconcat(prefix, "_z")>;
+multiclass AMDGPUReadPreloadRegisterIntrinsic_xyz {
+ def _x : AMDGPUReadPreloadRegisterIntrinsic;
+ def _y : AMDGPUReadPreloadRegisterIntrinsic;
+ def _z : AMDGPUReadPreloadRegisterIntrinsic;
+}
+
+multiclass AMDGPUReadPreloadRegisterIntrinsic_xyz_named<string prefix> {
+ def _x : AMDGPUReadPreloadRegisterIntrinsicNamed<!strconcat(prefix, "_x")>;
+ def _y : AMDGPUReadPreloadRegisterIntrinsicNamed<!strconcat(prefix, "_y")>;
+ def _z : AMDGPUReadPreloadRegisterIntrinsicNamed<!strconcat(prefix, "_z")>;
}
-defm int_r600_read_global_size : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_r600_read_global_size">;
-defm int_r600_read_local_size : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_r600_read_local_size">;
-defm int_r600_read_ngroups : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_r600_read_ngroups">;
-defm int_r600_read_tgid : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_r600_read_tgid">;
-defm int_r600_read_tidig : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_r600_read_tidig">;
+defm int_r600_read_global_size : AMDGPUReadPreloadRegisterIntrinsic_xyz_named
+ <"__builtin_r600_read_global_size">;
+defm int_r600_read_ngroups : AMDGPUReadPreloadRegisterIntrinsic_xyz_named
+ <"__builtin_r600_read_ngroups">;
+defm int_r600_read_tgid : AMDGPUReadPreloadRegisterIntrinsic_xyz_named
+ <"__builtin_r600_read_tgid">;
+
+defm int_r600_read_local_size : AMDGPUReadPreloadRegisterIntrinsic_xyz;
+defm int_r600_read_tidig : AMDGPUReadPreloadRegisterIntrinsic_xyz;
+
+def int_r600_read_workdim : AMDGPUReadPreloadRegisterIntrinsic;
def int_r600_rat_store_typed :
// 1st parameter: Data
@@ -45,9 +54,6 @@ def int_r600_rsq : Intrinsic<
[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]
>;
-def int_r600_read_workdim : AMDGPUReadPreloadRegisterIntrinsic <
- "__builtin_r600_read_workdim"
->;
} // End TargetPrefix = "r600"
@@ -60,10 +66,9 @@ def int_AMDGPU_ldexp : Intrinsic<
let TargetPrefix = "amdgcn" in {
-defm int_amdgcn_workitem_id : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_amdgcn_workitem_id">;
-defm int_amdgcn_workgroup_id : AMDGPUReadPreloadRegisterIntrinsic_xyz <
- "__builtin_amdgcn_workgroup_id">;
+defm int_amdgcn_workitem_id : AMDGPUReadPreloadRegisterIntrinsic_xyz;
+defm int_amdgcn_workgroup_id : AMDGPUReadPreloadRegisterIntrinsic_xyz_named
+ <"__builtin_amdgcn_workgroup_id">;
def int_amdgcn_s_barrier : GCCBuiltin<"__builtin_amdgcn_s_barrier">,
Intrinsic<[], [], [IntrConvergent]>;
@@ -289,8 +294,7 @@ def int_amdgcn_buffer_atomic_cmpswap : I
llvm_i1_ty], // slc(imm)
[]>;
-def int_amdgcn_read_workdim : AMDGPUReadPreloadRegisterIntrinsic <
- "__builtin_amdgcn_read_workdim">;
+def int_amdgcn_read_workdim : AMDGPUReadPreloadRegisterIntrinsic;
def int_amdgcn_buffer_wbinvl1_sc :
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