[lld] r273248 - Detect invalid use of R_X86_64_GOTTPOFF.
Rui Ueyama via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 20 23:03:28 PDT 2016
Author: ruiu
Date: Tue Jun 21 01:03:28 2016
New Revision: 273248
URL: http://llvm.org/viewvc/llvm-project?rev=273248&view=rev
Log:
Detect invalid use of R_X86_64_GOTTPOFF.
It is an ABI requirement that the relocation must be used
in MOVQ or LEAQ instructions. Previously, we ignored invalid
relocations.
Modified:
lld/trunk/ELF/Target.cpp
lld/trunk/test/ELF/tls-archive.s
lld/trunk/test/ELF/tls-opt.s
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=273248&r1=273247&r2=273248&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Tue Jun 21 01:03:28 2016
@@ -707,6 +707,8 @@ void X86_64TargetInfo::relaxTlsIeToLe(ui
// "movq foo at gottpoff(%rip),%reg" -> "movq $foo,%reg"
memcpy(Inst, "\x48\xc7", 2);
*RegSlot = 0xc0 | Reg;
+ } else {
+ fatal("R_X86_64_GOTTPOFF must be used in MOVQ or ADDQ instructions only");
}
// The original code used a PC relative relocation.
Modified: lld/trunk/test/ELF/tls-archive.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-archive.s?rev=273248&r1=273247&r2=273248&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-archive.s (original)
+++ lld/trunk/test/ELF/tls-archive.s Tue Jun 21 01:03:28 2016
@@ -7,4 +7,4 @@
.globl _start,tlsvar
_start:
- movl tlsvar at GOTTPOFF(%rip),%edx
+ movq tlsvar at GOTTPOFF(%rip),%rdx
Modified: lld/trunk/test/ELF/tls-opt.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-opt.s?rev=273248&r1=273247&r2=273248&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-opt.s (original)
+++ lld/trunk/test/ELF/tls-opt.s Tue Jun 21 01:03:28 2016
@@ -6,38 +6,37 @@
// NORELOC: Relocations [
// NORELOC-NEXT: ]
-// DISASM: Disassembly of section .text:
-// DISASM-NEXT: _start:
-// DISASM-NEXT: 11000: 48 c7 c0 f8 ff ff ff movq $-8, %rax
-// DISASM-NEXT: 11007: 49 c7 c7 f8 ff ff ff movq $-8, %r15
-// DISASM-NEXT: 1100e: 48 8d 80 f8 ff ff ff leaq -8(%rax), %rax
-// DISASM-NEXT: 11015: 4d 8d bf f8 ff ff ff leaq -8(%r15), %r15
-// DISASM-NEXT: 1101c: 48 81 c4 f8 ff ff ff addq $-8, %rsp
-// DISASM-NEXT: 11023: 49 81 c4 f8 ff ff ff addq $-8, %r12
-// DISASM-NEXT: 1102a: 48 c7 c0 fc ff ff ff movq $-4, %rax
-// DISASM-NEXT: 11031: 49 c7 c7 fc ff ff ff movq $-4, %r15
-// DISASM-NEXT: 11038: 48 8d 80 fc ff ff ff leaq -4(%rax), %rax
-// DISASM-NEXT: 1103f: 4d 8d bf fc ff ff ff leaq -4(%r15), %r15
-// DISASM-NEXT: 11046: 48 81 c4 fc ff ff ff addq $-4, %rsp
-// DISASM-NEXT: 1104d: 49 81 c4 fc ff ff ff addq $-4, %r12
-// DISASM-NEXT: 11054: 48 87 05 f8 ff ff ff xchgq %rax, -8(%rip)
-// DISASM-NEXT: 1105b: 48 d1 24 25 fc ff ff ff shlq -4
-// DISASM-NEXT: 11063: 48 d1 04 25 fc ff ff ff rolq -4
+// DISASM: _start:
+// DISASM-NEXT: 11000: 48 c7 c0 f8 ff ff ff movq $-8, %rax
+// DISASM-NEXT: 11007: 49 c7 c7 f8 ff ff ff movq $-8, %r15
+// DISASM-NEXT: 1100e: 48 8d 80 f8 ff ff ff leaq -8(%rax), %rax
+// DISASM-NEXT: 11015: 4d 8d bf f8 ff ff ff leaq -8(%r15), %r15
+// DISASM-NEXT: 1101c: 48 81 c4 f8 ff ff ff addq $-8, %rsp
+// DISASM-NEXT: 11023: 49 81 c4 f8 ff ff ff addq $-8, %r12
+// DISASM-NEXT: 1102a: 48 c7 c0 fc ff ff ff movq $-4, %rax
+// DISASM-NEXT: 11031: 49 c7 c7 fc ff ff ff movq $-4, %r15
+// DISASM-NEXT: 11038: 48 8d 80 fc ff ff ff leaq -4(%rax), %rax
+// DISASM-NEXT: 1103f: 4d 8d bf fc ff ff ff leaq -4(%r15), %r15
+// DISASM-NEXT: 11046: 48 81 c4 fc ff ff ff addq $-4, %rsp
+// DISASM-NEXT: 1104d: 49 81 c4 fc ff ff ff addq $-4, %r12
+
// LD to LE:
-// DISASM-NEXT: 1106b: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
-// DISASM-NEXT: 11077: 48 8d 88 f8 ff ff ff leaq -8(%rax), %rcx
-// DISASM-NEXT: 1107e: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
-// DISASM-NEXT: 1108a: 48 8d 88 fc ff ff ff leaq -4(%rax), %rcx
+// DISASM-NEXT: 11054: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
+// DISASM-NEXT: 11060: 48 8d 88 f8 ff ff ff leaq -8(%rax), %rcx
+// DISASM-NEXT: 11067: 66 66 66 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
+// DISASM-NEXT: 11073: 48 8d 88 fc ff ff ff leaq -4(%rax), %rcx
+
// GD to LE:
-// DISASM-NEXT: 11091: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
-// DISASM-NEXT: 1109a: 48 8d 80 f8 ff ff ff leaq -8(%rax), %rax
-// DISASM-NEXT: 110a1: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
-// DISASM-NEXT: 110aa: 48 8d 80 fc ff ff ff leaq -4(%rax), %rax
-// LD to LE (2):
-// DISASM: _DTPOFF64_1:
-// DISASM-NEXT: 110b1: f8
+// DISASM-NEXT: 1107a: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
+// DISASM-NEXT: 11083: 48 8d 80 f8 ff ff ff leaq -8(%rax), %rax
+// DISASM-NEXT: 1108a: 64 48 8b 04 25 00 00 00 00 movq %fs:0, %rax
+// DISASM-NEXT: 11093: 48 8d 80 fc ff ff ff leaq -4(%rax), %rax
+
+// LD to LE:
+// DISASM: _DTPOFF64_1:
+// DISASM-NEXT: 1109a: f8 clc
// DISASM: _DTPOFF64_2:
-// DISASM-NEXT: 110ba: fc
+// DISASM-NEXT: 110a3: fc cld
.type tls0, at object
.section .tbss,"awT", at nobits
@@ -70,12 +69,7 @@ _start:
addq tls1 at GOTTPOFF(%rip), %rsp
addq tls1 at GOTTPOFF(%rip), %r12
- //Invalid input case:
- xchgq tls0 at gottpoff(%rip),%rax
- shlq tls0 at gottpoff
- rolq tls0 at gottpoff
-
- //LD to LE:
+ // LD to LE
leaq tls0 at tlsld(%rip), %rdi
callq __tls_get_addr at PLT
leaq tls0 at dtpoff(%rax),%rcx
@@ -83,7 +77,7 @@ _start:
callq __tls_get_addr at PLT
leaq tls1 at dtpoff(%rax),%rcx
- //GD to LE:
+ // GD to LE
.byte 0x66
leaq tls0 at tlsgd(%rip),%rdi
.word 0x6666
@@ -95,7 +89,7 @@ _start:
rex64
call __tls_get_addr at plt
- //LD to LE (2):
+ // LD to LE
_DTPOFF64_1:
.quad tls0 at DTPOFF
nop
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