[llvm] r273235 - TableGen/CodeGenSchedule: Move some getAllDerivedDefinitions() calls out of inner loops

[Matthias Braun via llvm-commits]

Author: matze
Date: Mon Jun 20 22:24:03 2016
New Revision: 273235

URL: http://llvm.org/viewvc/llvm-project?rev=273235&view=rev
Log:
TableGen/CodeGenSchedule: Move some getAllDerivedDefinitions() calls out of inner loops

This cuts the runtime of the two slowest tblgen invocations in aarch64
in half for me...

Modified:
    llvm/trunk/utils/TableGen/CodeGenSchedule.cpp
    llvm/trunk/utils/TableGen/CodeGenSchedule.h

Modified: llvm/trunk/utils/TableGen/CodeGenSchedule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenSchedule.cpp?rev=273235&r1=273234&r2=273235&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenSchedule.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenSchedule.cpp Mon Jun 20 22:24:03 2016
@@ -1429,6 +1429,9 @@ void CodeGenSchedModels::verifyProcResou
 
 // Collect and sort WriteRes, ReadAdvance, and ProcResources.
 void CodeGenSchedModels::collectProcResources() {
+  ProcResourceDefs = Records.getAllDerivedDefinitions("ProcResourceUnits");
+  ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup");
+
   // Add any subtarget-specific SchedReadWrites that are directly associated
   // with processor resources. Refer to the parent SchedClass's ProcIndices to
   // determine which processors they apply to.
@@ -1523,6 +1526,9 @@ void CodeGenSchedModels::collectProcReso
       dbgs() << '\n');
     verifyProcResourceGroups(PM);
   }
+
+  ProcResourceDefs.clear();
+  ProcResGroups.clear();
 }
 
 void CodeGenSchedModels::checkCompleteness() {
@@ -1652,8 +1658,8 @@ Record *CodeGenSchedModels::findProcResU
     return ProcResKind;
 
   Record *ProcUnitDef = nullptr;
-  RecVec ProcResourceDefs =
-    Records.getAllDerivedDefinitions("ProcResourceUnits");
+  assert(!ProcResourceDefs.empty());
+  assert(!ProcResGroups.empty());
 
   for (RecIter RI = ProcResourceDefs.begin(), RE = ProcResourceDefs.end();
        RI != RE; ++RI) {
@@ -1668,7 +1674,6 @@ Record *CodeGenSchedModels::findProcResU
       ProcUnitDef = *RI;
     }
   }
-  RecVec ProcResGroups = Records.getAllDerivedDefinitions("ProcResGroup");
   for (RecIter RI = ProcResGroups.begin(), RE = ProcResGroups.end();
        RI != RE; ++RI) {
 

Modified: llvm/trunk/utils/TableGen/CodeGenSchedule.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenSchedule.h?rev=273235&r1=273234&r2=273235&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenSchedule.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenSchedule.h Mon Jun 20 22:24:03 2016
@@ -241,6 +241,9 @@ class CodeGenSchedModels {
   // Any inferred SchedClass has an index greater than NumInstrSchedClassses.
   unsigned NumInstrSchedClasses;
 
+  RecVec ProcResourceDefs;
+  RecVec ProcResGroups;
+
   // Map each instruction to its unique SchedClass index considering the
   // combination of it's itinerary class, SchedRW list, and InstRW records.
   typedef DenseMap<Record*, unsigned> InstClassMapTy;