[PATCH] D21539: [X86] Set isMovImm for some X86 instructions

Sanjoy Das via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 20 16:40:01 PDT 2016


sanjoy created this revision.
sanjoy added reviewers: MatzeB, qcolombet.
sanjoy added a subscriber: llvm-commits.
Herald added a subscriber: mcrosier.

This makes MI->isMoveImmediate() return true for the right instructions.
This is *not* an NFC since the PeepholeOptimizer pass uses this, and it
looks like the x86 backend runs PeepholeOptimizer (but no X86 test
breaks after this change).

Ideas on how to test this (or a justification for why this is NFC! :) )
will be appreciated.

http://reviews.llvm.org/D21539

Files:
  lib/Target/X86/X86InstrInfo.td

Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -1371,7 +1371,7 @@
                  "mov{q}\t{$src, $dst|$dst, $src}", [], IIC_MOV>;
 }
 
-let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
+let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
 def MOV8ri  : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
                    "mov{b}\t{$src, $dst|$dst, $src}",
                    [(set GR8:$dst, imm:$src)], IIC_MOV>;
@@ -1385,7 +1385,7 @@
                        "mov{q}\t{$src, $dst|$dst, $src}",
                        [(set GR64:$dst, i64immSExt32:$src)], IIC_MOV>;
 }
-let isReMaterializable = 1 in {
+let isReMaterializable = 1, isMoveImm = 1 in {
 def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src),
                     "movabs{q}\t{$src, $dst|$dst, $src}",
                     [(set GR64:$dst, imm:$src)], IIC_MOV>;


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