[PATCH] D21091: AArch64: refactor sysreg handling (new TableGen backend!)
Ahmed Bougacha via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 20 14:20:46 PDT 2016
ab added a comment.
Nicer indeed!
Another quick pass and some minor details; I'll have a closer look later.
================
Comment at: include/llvm/TableGen/Record.h:610
@@ +609,3 @@
+
+class CodeInit : public TypedInit {
+ std::string Value;
----------------
Worth a (yes, duplicated) comment, if only for consistency?
================
Comment at: lib/Target/AArch64/AArch64SystemOperands.td:60-61
@@ +59,4 @@
+ string Name = name;
+ bits<4> Encoding;
+ let Encoding = encoding;
+}
----------------
Any reason this isn't:
bits<4> Encoding = encoding;
?
================
Comment at: utils/TableGen/SearchableTableEmitter.cpp:300-301
@@ +299,4 @@
+ // Indexes are sorted "{ Thing, PrimaryIdx }" arrays, so that a binary
+ // search
+ // can be performed by "Thing".
+ for (unsigned i = 0; i < SearchTables.size(); ++i) {
----------------
Wrapping
Repository:
rL LLVM
http://reviews.llvm.org/D21091
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