[PATCH] D21500: [AARCH64] Add support for Broadcom Vulcan
pankaj gode via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 19 01:47:34 PDT 2016
pgode created this revision.
pgode added reviewers: t.p.northover, rengolin.
pgode added subscribers: llvm-commits, MatzeB, aemerson, echristo.
Herald added a subscriber: rengolin.
Adding core tuning support for new Broadcom Vulcan core (ARMv8.1A).
http://reviews.llvm.org/D21500
Files:
include/llvm/Support/AArch64TargetParser.def
lib/Target/AArch64/AArch64.td
lib/Target/AArch64/AArch64Subtarget.cpp
lib/Target/AArch64/AArch64Subtarget.h
test/CodeGen/AArch64/cpus.ll
test/CodeGen/AArch64/remat.ll
Index: test/CodeGen/AArch64/remat.ll
===================================================================
--- test/CodeGen/AArch64/remat.ll
+++ test/CodeGen/AArch64/remat.ll
@@ -5,6 +5,7 @@
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a73 -o - %s | FileCheck %s
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=exynos-m1 -o - %s | FileCheck %s
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=kryo -o - %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=vulcan -o - %s | FileCheck %s
%X = type { i64, i64, i64 }
declare void @f(%X*)
Index: test/CodeGen/AArch64/cpus.ll
===================================================================
--- test/CodeGen/AArch64/cpus.ll
+++ test/CodeGen/AArch64/cpus.ll
@@ -9,6 +9,7 @@
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=vulcan 2>&1 | FileCheck %s
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
; CHECK-NOT: {{.*}} is not a recognized processor for this target
Index: lib/Target/AArch64/AArch64Subtarget.h
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.h
+++ lib/Target/AArch64/AArch64Subtarget.h
@@ -41,7 +41,8 @@
CortexA57,
Cyclone,
ExynosM1,
- Kryo
+ Kryo,
+ Vulcan
};
protected:
Index: lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- lib/Target/AArch64/AArch64Subtarget.cpp
+++ lib/Target/AArch64/AArch64Subtarget.cpp
@@ -71,6 +71,7 @@
MaxInterleaveFactor = 4;
VectorInsertExtractBaseCost = 2;
break;
+ case Vulcan: break;
case CortexA35: break;
case CortexA53: break;
case Others: break;
Index: lib/Target/AArch64/AArch64.td
===================================================================
--- lib/Target/AArch64/AArch64.td
+++ lib/Target/AArch64/AArch64.td
@@ -215,6 +215,14 @@
FeaturePredictableSelectIsExpensive
]>;
+def ProcVulcan : SubtargetFeature<"vulcan", "ARMProcFamily", "Vulcan",
+ "Broadcom Vulcan processors", [
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureCrypto,
+ FeatureCRC,
+ HasV8_1aOps]>;
+
def : ProcessorModel<"generic", NoSchedModel, [
FeatureCRC,
FeatureFPARMv8,
@@ -233,6 +241,7 @@
def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;
+def : ProcessorModel<"vulcan", NoSchedModel, [ProcVulcan]>;
//===----------------------------------------------------------------------===//
// Assembly parser
Index: include/llvm/Support/AArch64TargetParser.def
===================================================================
--- include/llvm/Support/AArch64TargetParser.def
+++ include/llvm/Support/AArch64TargetParser.def
@@ -65,6 +65,8 @@
(AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
AARCH64_CPU_NAME("kryo", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
+AARCH64_CPU_NAME("vulcan", AK_ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (AArch64::AEK_SIMD | AArch64::AEK_CRC | AArch64::AEK_CRYPTO))
// Invalid CPU
AARCH64_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
#undef AARCH64_CPU_NAME
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