[PATCH] D21481: ELF/AMDGPU: Add support for GOT relocations
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 17 14:30:33 PDT 2016
tstellarAMD created this revision.
tstellarAMD added reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye.
tstellarAMD added a subscriber: llvm-commits.
Herald added a subscriber: kzhuravl.
http://reviews.llvm.org/D21481
Files:
ELF/Target.cpp
test/ELF/amdgpu-relocs.s
Index: test/ELF/amdgpu-relocs.s
===================================================================
--- test/ELF/amdgpu-relocs.s
+++ test/ELF/amdgpu-relocs.s
@@ -4,17 +4,30 @@
# REQUIRES: amdgpu
-# Make sure that the reloc for gdata is resolved by lld.
-
.text
kernel0:
- s_mov_b32 s0, gdata+4
+ s_mov_b32 s0, common_var at GOTPCREL+4
+ s_mov_b32 s0, extern_var at GOTPCREL+4
+ s_mov_b32 s0, local_var+4
+ s_mov_b32 s0, global_var at GOTPCREL+4
+ s_mov_b32 s0, weak_var at GOTPCREL+4
+ s_mov_b32 s0, weakref_var at GOTPCREL+4
s_endpgm
- .type gdata, at object
- .local gdata
- .comm gdata,1024,4
+ .comm common_var,1024,4
+ .globl global_var
+ .local local_var
+ .weak weak_var
+ .weakref weakref_var, weakref_alias_var
+# The relocation for local_var should be resolved by the linker.
# CHECK: Relocations [
+# CHECK: .rela.dyn {
+# CHECK-NEXT: R_AMDGPU_ABS64 common_var 0x0
+# CHECK-NEXT: R_AMDGPU_ABS64 extern_var 0x0
+# CHECK-NEXT: R_AMDGPU_ABS64 global_var 0x0
+# CHECK-NEXT: R_AMDGPU_ABS64 weak_var 0x0
+# CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var 0x0
+# CHECK-NEXT: }
# CHECK-NEXT: ]
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -166,7 +166,7 @@
class AMDGPUTargetInfo final : public TargetInfo {
public:
- AMDGPUTargetInfo() {}
+ AMDGPUTargetInfo();
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
};
@@ -1405,16 +1405,29 @@
llvm_unreachable("invalid relocation for TLS IE to LE relaxation");
}
+AMDGPUTargetInfo::AMDGPUTargetInfo() {
+ GotRel = R_AMDGPU_ABS64;
+}
+
void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
uint64_t Val) const {
- assert(Type == R_AMDGPU_REL32);
- write32le(Loc, Val);
+ switch (Type) {
+ case R_AMDGPU_GOTPCREL:
+ case R_AMDGPU_REL32:
+ write32le(Loc, Val);
+ break;
+ default:
+ fatal("unrecognized reloc " + Twine(Type));
+ }
}
RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
- if (Type != R_AMDGPU_REL32)
- error("do not know how to handle relocation");
- return R_PC;
+ switch (Type) {
+ default: error("do not know how to handle relocation");
+ // fall-through
+ case R_AMDGPU_REL32: return R_PC;
+ case R_AMDGPU_GOTPCREL: return R_GOT_PC;
+ }
}
ARMTargetInfo::ARMTargetInfo() {
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