[lld] r272913 - Rename PltZero -> PltHeader.
Rui Ueyama via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 16 09:28:50 PDT 2016
Author: ruiu
Date: Thu Jun 16 11:28:50 2016
New Revision: 272913
URL: http://llvm.org/viewvc/llvm-project?rev=272913&view=rev
Log:
Rename PltZero -> PltHeader.
PltZero (or PLT[0]) was an appropriate name for the little code
we have at beginning of the PLT section when we only supported x86
since the code for x86 just fits in the first PLT slot.
It's not the case anymore. The code for ARM64 occupies first two
slots, so PltZero spans PLT[0] and PLT[1], for example.
This patch renames it to avoid confusion.
Modified:
lld/trunk/ELF/OutputSections.cpp
lld/trunk/ELF/Symbols.cpp
lld/trunk/ELF/Target.cpp
lld/trunk/ELF/Target.h
Modified: lld/trunk/ELF/OutputSections.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/OutputSections.cpp?rev=272913&r1=272912&r2=272913&view=diff
==============================================================================
--- lld/trunk/ELF/OutputSections.cpp (original)
+++ lld/trunk/ELF/OutputSections.cpp Thu Jun 16 11:28:50 2016
@@ -275,8 +275,8 @@ PltSection<ELFT>::PltSection()
template <class ELFT> void PltSection<ELFT>::writeTo(uint8_t *Buf) {
// At beginning of PLT, we have code to call the dynamic linker
// to resolve dynsyms at runtime. Write such code.
- Target->writePltZero(Buf);
- size_t Off = Target->PltZeroSize;
+ Target->writePltHeader(Buf);
+ size_t Off = Target->PltHeaderSize;
for (auto &I : Entries) {
const SymbolBody *B = I.first;
@@ -296,7 +296,7 @@ template <class ELFT> void PltSection<EL
template <class ELFT> void PltSection<ELFT>::finalize() {
this->Header.sh_size =
- Target->PltZeroSize + Entries.size() * Target->PltEntrySize;
+ Target->PltHeaderSize + Entries.size() * Target->PltEntrySize;
}
template <class ELFT>
Modified: lld/trunk/ELF/Symbols.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Symbols.cpp?rev=272913&r1=272912&r2=272913&view=diff
==============================================================================
--- lld/trunk/ELF/Symbols.cpp (original)
+++ lld/trunk/ELF/Symbols.cpp Thu Jun 16 11:28:50 2016
@@ -162,7 +162,7 @@ template <class ELFT> typename ELFT::uin
}
template <class ELFT> typename ELFT::uint SymbolBody::getPltVA() const {
- return Out<ELFT>::Plt->getVA() + Target->PltZeroSize +
+ return Out<ELFT>::Plt->getVA() + Target->PltHeaderSize +
PltIndex * Target->PltEntrySize;
}
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=272913&r1=272912&r2=272913&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Thu Jun 16 11:28:50 2016
@@ -92,7 +92,7 @@ public:
bool isTlsGlobalDynamicRel(uint32_t Type) const override;
bool isTlsInitialExecRel(uint32_t Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
- void writePltZero(uint8_t *Buf) const override;
+ void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
@@ -115,7 +115,7 @@ public:
bool isTlsInitialExecRel(uint32_t Type) const override;
void writeGotPltHeader(uint8_t *Buf) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
- void writePltZero(uint8_t *Buf) const override;
+ void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
@@ -156,7 +156,7 @@ public:
uint32_t getDynRel(uint32_t Type) const override;
bool isTlsInitialExecRel(uint32_t Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
- void writePltZero(uint8_t *Buf) const override;
+ void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
bool usesOnlyLowPageBits(uint32_t Type) const override;
@@ -182,7 +182,7 @@ public:
uint32_t getDynRel(uint32_t Type) const override;
uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
- void writePltZero(uint8_t *Buf) const override;
+ void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
@@ -195,7 +195,7 @@ public:
uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
uint32_t getDynRel(uint32_t Type) const override;
void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
- void writePltZero(uint8_t *Buf) const override;
+ void writePltHeader(uint8_t *Buf) const override;
void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
int32_t Index, unsigned RelOff) const override;
void writeThunk(uint8_t *Buf, uint64_t S) const override;
@@ -302,7 +302,7 @@ X86TargetInfo::X86TargetInfo() {
TlsModuleIndexRel = R_386_TLS_DTPMOD32;
TlsOffsetRel = R_386_TLS_DTPOFF32;
PltEntrySize = 16;
- PltZeroSize = 16;
+ PltHeaderSize = 16;
TlsGdRelaxSkip = 2;
}
@@ -376,7 +376,7 @@ bool X86TargetInfo::isTlsInitialExecRel(
return Type == R_386_TLS_IE || Type == R_386_TLS_GOTIE;
}
-void X86TargetInfo::writePltZero(uint8_t *Buf) const {
+void X86TargetInfo::writePltHeader(uint8_t *Buf) const {
// Executable files and shared object files have
// separate procedure linkage tables.
if (Config->Pic) {
@@ -415,7 +415,7 @@ void X86TargetInfo::writePlt(uint8_t *Bu
uint32_t Got = Out<ELF32LE>::GotPlt->getVA();
write32le(Buf + 2, Config->Shared ? GotEntryAddr - Got : GotEntryAddr);
write32le(Buf + 7, RelOff);
- write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16);
+ write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
}
uint64_t X86TargetInfo::getImplicitAddend(const uint8_t *Buf,
@@ -543,7 +543,7 @@ X86_64TargetInfo::X86_64TargetInfo() {
TlsModuleIndexRel = R_X86_64_DTPMOD64;
TlsOffsetRel = R_X86_64_DTPOFF64;
PltEntrySize = 16;
- PltZeroSize = 16;
+ PltHeaderSize = 16;
TlsGdRelaxSkip = 2;
}
@@ -588,7 +588,7 @@ void X86_64TargetInfo::writeGotPlt(uint8
write32le(Buf, S.getPltVA<ELF64LE>() + 6);
}
-void X86_64TargetInfo::writePltZero(uint8_t *Buf) const {
+void X86_64TargetInfo::writePltHeader(uint8_t *Buf) const {
const uint8_t PltData[] = {
0xff, 0x35, 0x00, 0x00, 0x00, 0x00, // pushq GOT+8(%rip)
0xff, 0x25, 0x00, 0x00, 0x00, 0x00, // jmp *GOT+16(%rip)
@@ -613,7 +613,7 @@ void X86_64TargetInfo::writePlt(uint8_t
write32le(Buf + 2, GotEntryAddr - PltEntryAddr - 6);
write32le(Buf + 7, Index);
- write32le(Buf + 12, -Index * PltEntrySize - PltZeroSize - 16);
+ write32le(Buf + 12, -Index * PltEntrySize - PltHeaderSize - 16);
}
uint32_t X86_64TargetInfo::getDynRel(uint32_t Type) const {
@@ -1113,7 +1113,7 @@ AArch64TargetInfo::AArch64TargetInfo() {
TlsDescRel = R_AARCH64_TLSDESC;
TlsGotRel = R_AARCH64_TLS_TPREL64;
PltEntrySize = 16;
- PltZeroSize = 32;
+ PltHeaderSize = 32;
// It doesn't seem to be documented anywhere, but tls on aarch64 uses variant
// 1 of the tls structures and the tcb size is 16.
@@ -1211,7 +1211,7 @@ static uint64_t getAArch64Page(uint64_t
return Expr & (~static_cast<uint64_t>(0xFFF));
}
-void AArch64TargetInfo::writePltZero(uint8_t *Buf) const {
+void AArch64TargetInfo::writePltHeader(uint8_t *Buf) const {
const uint8_t PltData[] = {
0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]!
0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2]))
@@ -1453,7 +1453,7 @@ ARMTargetInfo::ARMTargetInfo() {
TlsModuleIndexRel = R_ARM_TLS_DTPMOD32;
TlsOffsetRel = R_ARM_TLS_DTPOFF32;
PltEntrySize = 16;
- PltZeroSize = 20;
+ PltHeaderSize = 20;
}
RelExpr ARMTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
@@ -1502,7 +1502,7 @@ void ARMTargetInfo::writeGotPlt(uint8_t
write32le(Buf, Out<ELF32LE>::Plt->getVA());
}
-void ARMTargetInfo::writePltZero(uint8_t *Buf) const {
+void ARMTargetInfo::writePltHeader(uint8_t *Buf) const {
const uint8_t PltData[] = {
0x04, 0xe0, 0x2d, 0xe5, // str lr, [sp,#-4]!
0x04, 0xe0, 0x9f, 0xe5, // ldr lr, L2
@@ -1720,7 +1720,7 @@ template <class ELFT> MipsTargetInfo<ELF
GotPltHeaderEntriesNum = 2;
PageSize = 65536;
PltEntrySize = 16;
- PltZeroSize = 32;
+ PltHeaderSize = 32;
ThunkSize = 16;
CopyRel = R_MIPS_COPY;
PltRel = R_MIPS_JUMP_SLOT;
@@ -1828,7 +1828,7 @@ template <endianness E> static int16_t r
}
template <class ELFT>
-void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const {
+void MipsTargetInfo<ELFT>::writePltHeader(uint8_t *Buf) const {
const endianness E = ELFT::TargetEndianness;
write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
Modified: lld/trunk/ELF/Target.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.h?rev=272913&r1=272912&r2=272913&view=diff
==============================================================================
--- lld/trunk/ELF/Target.h (original)
+++ lld/trunk/ELF/Target.h Thu Jun 16 11:28:50 2016
@@ -35,7 +35,7 @@ public:
// If lazy binding is supported, the first entry of the PLT has code
// to call the dynamic linker to resolve PLT entries the first time
// they are called. This function writes that code.
- virtual void writePltZero(uint8_t *Buf) const {}
+ virtual void writePltHeader(uint8_t *Buf) const {}
virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
uint64_t PltEntryAddr, int32_t Index,
@@ -78,7 +78,7 @@ public:
uint32_t TlsModuleIndexRel;
uint32_t TlsOffsetRel;
unsigned PltEntrySize = 8;
- unsigned PltZeroSize = 0;
+ unsigned PltHeaderSize = 0;
// At least on x86_64 positions 1 and 2 are used by the first plt entry
// to support lazy loading.
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