[llvm] r272801 - [X86]: Quit promoting 8 and 16 bit compares to 32 bit.
Kevin B. Smith via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 15 09:37:46 PDT 2016
Author: kbsmith1
Date: Wed Jun 15 11:37:46 2016
New Revision: 272801
URL: http://llvm.org/viewvc/llvm-project?rev=272801&view=rev
Log:
[X86]: Quit promoting 8 and 16 bit compares to 32 bit.
Differential Revision: http://reviews.llvm.org/D21144
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
llvm/trunk/test/CodeGen/X86/atomic16.ll
llvm/trunk/test/CodeGen/X86/atomic8.ll
llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
llvm/trunk/test/CodeGen/X86/memcmp.ll
llvm/trunk/test/CodeGen/X86/pr5145.ll
llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jun 15 11:37:46 2016
@@ -3927,26 +3927,6 @@ bool X86::isCalleePop(CallingConv::ID Ca
}
}
-/// \brief Return true if the condition is an unsigned comparison operation.
-static bool isX86CCUnsigned(unsigned X86CC) {
- switch (X86CC) {
- default:
- llvm_unreachable("Invalid integer condition!");
- case X86::COND_E:
- case X86::COND_NE:
- case X86::COND_B:
- case X86::COND_A:
- case X86::COND_BE:
- case X86::COND_AE:
- return true;
- case X86::COND_G:
- case X86::COND_GE:
- case X86::COND_L:
- case X86::COND_LE:
- return false;
- }
-}
-
static X86::CondCode TranslateIntegerX86CC(ISD::CondCode SetCCOpcode) {
switch (SetCCOpcode) {
default: llvm_unreachable("Invalid integer condition!");
@@ -14766,18 +14746,6 @@ SDValue X86TargetLowering::EmitCmp(SDVal
if ((Op0.getValueType() == MVT::i8 || Op0.getValueType() == MVT::i16 ||
Op0.getValueType() == MVT::i32 || Op0.getValueType() == MVT::i64)) {
- // Do the comparison at i32 if it's smaller, besides the Atom case.
- // This avoids subregister aliasing issues. Keep the smaller reference
- // if we're optimizing for size, however, as that'll allow better folding
- // of memory operations.
- if (Op0.getValueType() != MVT::i32 && Op0.getValueType() != MVT::i64 &&
- !DAG.getMachineFunction().getFunction()->optForMinSize() &&
- !Subtarget.isAtom()) {
- unsigned ExtendOp =
- isX86CCUnsigned(X86CC) ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND;
- Op0 = DAG.getNode(ExtendOp, dl, MVT::i32, Op0);
- Op1 = DAG.getNode(ExtendOp, dl, MVT::i32, Op1);
- }
// Use SUB instead of CMP to enable CSE between SUB and CMP.
SDVTList VTs = DAG.getVTList(Op0.getValueType(), MVT::i32);
SDValue Sub = DAG.getNode(X86ISD::SUB, dl, VTs,
Modified: llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/3addr-16bit.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/3addr-16bit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/3addr-16bit.ll Wed Jun 15 11:37:46 2016
@@ -12,7 +12,7 @@ entry:
; 64BIT-LABEL: t1:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal 1(%rsi), %eax
+; 64BIT: movl %esi, %eax
%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
%1 = add i16 %k, 1 ; <i16> [#uses=3]
br i1 %0, label %bb, label %bb1
@@ -34,7 +34,7 @@ entry:
; 64BIT-LABEL: t2:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal -1(%rsi), %eax
+; 64BIT: movl %esi, %eax
; 64BIT: movzwl %ax
%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
%1 = add i16 %k, -1 ; <i16> [#uses=3]
@@ -59,7 +59,7 @@ entry:
; 64BIT-LABEL: t3:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal 2(%rsi), %eax
+; 64BIT: movl %esi, %eax
%0 = add i16 %k, 2 ; <i16> [#uses=3]
%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
br i1 %1, label %bb, label %bb1
@@ -82,7 +82,7 @@ entry:
; 64BIT-LABEL: t4:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal (%rsi,%rdi), %eax
+; 64BIT: movl %esi, %eax
%0 = add i16 %k, %c ; <i16> [#uses=3]
%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
br i1 %1, label %bb, label %bb1
Modified: llvm/trunk/test/CodeGen/X86/atomic16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic16.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic16.ll Wed Jun 15 11:37:46 2016
@@ -154,17 +154,19 @@ define void @atomic_fetch_nand16(i16 %x)
}
define void @atomic_fetch_max16(i16 %x) nounwind {
+; X64-LABEL: atomic_fetch_max16
+; X32-LABEL: atomic_fetch_max16
%t1 = atomicrmw max i16* @sc16, i16 %x acquire
-; X64: movswl
-; X64: movswl
-; X64: subl
+; X64: movw
+; X64: movw
+; X64: subw
; X64: cmov
; X64: lock
; X64: cmpxchgw
-; X32: movswl
-; X32: movswl
-; X32: subl
+; X32: movw
+; X32: movw
+; X32: subw
; X32: cmov
; X32: lock
; X32: cmpxchgw
@@ -174,17 +176,19 @@ define void @atomic_fetch_max16(i16 %x)
}
define void @atomic_fetch_min16(i16 %x) nounwind {
+; X64-LABEL: atomic_fetch_min16
+; X32-LABEL: atomic_fetch_min16
%t1 = atomicrmw min i16* @sc16, i16 %x acquire
-; X64: movswl
-; X64: movswl
-; X64: subl
+; X64: movw
+; X64: movw
+; X64: subw
; X64: cmov
; X64: lock
; X64: cmpxchgw
-; X32: movswl
-; X32: movswl
-; X32: subl
+; X32: movw
+; X32: movw
+; X32: subw
; X32: cmov
; X32: lock
; X32: cmpxchgw
@@ -194,17 +198,19 @@ define void @atomic_fetch_min16(i16 %x)
}
define void @atomic_fetch_umax16(i16 %x) nounwind {
+; X64-LABEL: atomic_fetch_umax16
+; X32-LABEL: atomic_fetch_umax16
%t1 = atomicrmw umax i16* @sc16, i16 %x acquire
-; X64: movzwl
-; X64: movzwl
-; X64: subl
+; X64: movw
+; X64: movw
+; X64: subw
; X64: cmov
; X64: lock
; X64: cmpxchgw
-; X32: movzwl
-; X32: movzwl
-; X32: subl
+; X32: movw
+; X32: movw
+; X32: subw
; X32: cmov
; X32: lock
; X32: cmpxchgw
@@ -214,17 +220,19 @@ define void @atomic_fetch_umax16(i16 %x)
}
define void @atomic_fetch_umin16(i16 %x) nounwind {
+; X64-LABEL: atomic_fetch_umin16
+; X32-LABEL: atomic_fetch_umin16
%t1 = atomicrmw umin i16* @sc16, i16 %x acquire
-; X64: movzwl
-; X64: movzwl
-; X64: subl
+; X64: movw
+; X64: movw
+; X64: subw
; X64: cmov
; X64: lock
; X64: cmpxchgw
-; X32: movzwl
-; X32: movzwl
-; X32: subl
+; X32: movw
+; X32: movw
+; X32: subw
; X32: cmov
; X32: lock
; X32: cmpxchgw
Modified: llvm/trunk/test/CodeGen/X86/atomic8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atomic8.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atomic8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atomic8.ll Wed Jun 15 11:37:46 2016
@@ -157,15 +157,15 @@ define void @atomic_fetch_max8(i8 %x) no
; X64-LABEL: atomic_fetch_max8:
; X32-LABEL: atomic_fetch_max8:
%t1 = atomicrmw max i8* @sc8, i8 %x acquire
-; X64: movsbl
-; X64: movsbl
-; X64: subl
+; X64: movb
+; X64: movb
+; X64: subb
; X64: lock
; X64: cmpxchgb
-; X32: movsbl
-; X32: movsbl
-; X32: subl
+; X32: movb
+; X32: movb
+; X32: subb
; X32: lock
; X32: cmpxchgb
ret void
@@ -177,15 +177,15 @@ define void @atomic_fetch_min8(i8 %x) no
; X64-LABEL: atomic_fetch_min8:
; X32-LABEL: atomic_fetch_min8:
%t1 = atomicrmw min i8* @sc8, i8 %x acquire
-; X64: movsbl
-; X64: movsbl
-; X64: subl
+; X64: movb
+; X64: movb
+; X64: subb
; X64: lock
; X64: cmpxchgb
-; X32: movsbl
-; X32: movsbl
-; X32: subl
+; X32: movb
+; X32: movb
+; X32: subb
; X32: lock
; X32: cmpxchgb
ret void
@@ -197,15 +197,15 @@ define void @atomic_fetch_umax8(i8 %x) n
; X64-LABEL: atomic_fetch_umax8:
; X32-LABEL: atomic_fetch_umax8:
%t1 = atomicrmw umax i8* @sc8, i8 %x acquire
-; X64: movzbl
-; X64: movzbl
-; X64: subl
+; X64: movb
+; X64: movb
+; X64: subb
; X64: lock
; X64: cmpxchgb
-; X32: movzbl
-; X32: movzbl
-; X32: subl
+; X32: movb
+; X32: movb
+; X32: subb
; X32: lock
; X32: cmpxchgb
ret void
@@ -217,15 +217,15 @@ define void @atomic_fetch_umin8(i8 %x) n
; X64-LABEL: atomic_fetch_umin8:
; X32-LABEL: atomic_fetch_umin8:
%t1 = atomicrmw umin i8* @sc8, i8 %x acquire
-; X64: movzbl
-; X64: movzbl
-; X64: subl
+; X64: movb
+; X64: movb
+; X64: subb
; X64: lock
; X64: cmpxchgb
-; X32: movzbl
-; X32: movzbl
-; X32: subl
+; X32: movb
+; X32: movb
+; X32: subb
; X32: lock
; X32: cmpxchgb
ret void
Modified: llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ctpop-combine.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ctpop-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ctpop-combine.ll Wed Jun 15 11:37:46 2016
@@ -35,6 +35,6 @@ define i32 @test3(i64 %x) nounwind readn
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: test3:
-; CHECK: cmpl $2
+; CHECK: cmpb $2
; CHECK: ret
}
Modified: llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll Wed Jun 15 11:37:46 2016
@@ -67,7 +67,7 @@ define i1 @g(i8 addrspace(1)* %p0, i8* %
; CHECK-NEXT: .byte 1
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
-; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 1
; FunctionInfo[0] =
Modified: llvm/trunk/test/CodeGen/X86/memcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/memcmp.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/memcmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/memcmp.ll Wed Jun 15 11:37:46 2016
@@ -23,8 +23,7 @@ return:
ret void
; CHECK-LABEL: memcmp2:
; CHECK: movzwl
-; CHECK-NEXT: movzwl
-; CHECK-NEXT: cmpl
+; CHECK-NEXT: cmpw
; NOBUILTIN-LABEL: memcmp2:
; NOBUILTIN: callq
}
@@ -42,8 +41,7 @@ bb:
return: ; preds = %entry
ret void
; CHECK-LABEL: memcmp2a:
-; CHECK: movzwl
-; CHECK-NEXT: cmpl $28527,
+; CHECK: cmpw $28527, (%
}
Modified: llvm/trunk/test/CodeGen/X86/pr5145.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr5145.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr5145.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr5145.ll Wed Jun 15 11:37:46 2016
@@ -5,26 +5,26 @@ define void @atomic_maxmin_i8() {
; CHECK: atomic_maxmin_i8
%1 = atomicrmw max i8* @sc8, i8 5 acquire
; CHECK: [[LABEL1:\.?LBB[0-9]+_[0-9]+]]:
-; CHECK: movsbl
-; CHECK: cmpl
+; CHECK: cmpb
+; CHECK: jg
; CHECK: lock cmpxchgb
; CHECK: jne [[LABEL1]]
%2 = atomicrmw min i8* @sc8, i8 6 acquire
; CHECK: [[LABEL3:\.?LBB[0-9]+_[0-9]+]]:
-; CHECK: movsbl
-; CHECK: cmpl
+; CHECK: cmpb
+; CHECK: jl
; CHECK: lock cmpxchgb
; CHECK: jne [[LABEL3]]
%3 = atomicrmw umax i8* @sc8, i8 7 acquire
; CHECK: [[LABEL5:\.?LBB[0-9]+_[0-9]+]]:
-; CHECK: movzbl
-; CHECK: cmpl
+; CHECK: cmpb
+; CHECK: ja
; CHECK: lock cmpxchgb
; CHECK: jne [[LABEL5]]
%4 = atomicrmw umin i8* @sc8, i8 8 acquire
; CHECK: [[LABEL7:\.?LBB[0-9]+_[0-9]+]]:
-; CHECK: movzbl
-; CHECK: cmpl
+; CHECK: cmpb
+; CHECK: jb
; CHECK: lock cmpxchgb
; CHECK: jne [[LABEL7]]
ret void
Modified: llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll?rev=272801&r1=272800&r2=272801&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll Wed Jun 15 11:37:46 2016
@@ -520,8 +520,7 @@ declare hidden fastcc %struct.temp_slot*
; CHECK: testq %rdi, %rdi
; CHECK-NEXT: je [[CLEANUP:LBB[0-9_]+]]
;
-; CHECK: movzwl (%rdi), [[BF_LOAD:%e[a-z]+]]
-; CHECK-NEXT: cmpl $66, [[BF_LOAD]]
+; CHECK: cmpw $66, (%rdi)
; CHECK-NEXT: jne [[CLEANUP]]
;
; CHECK: movq 8(%rdi), %rdi
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