[PATCH] D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions
Zlatko Buljan via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 15 00:53:16 PDT 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL272764: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and… (authored by zbuljan).
Changed prior to commit:
http://reviews.llvm.org/D16719?vs=60164&id=60797#toc
Repository:
rL LLVM
http://reviews.llvm.org/D16719
Files:
llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/test/CodeGen/Mips/fcmp.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/and.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/ashr.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/lshr.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/not.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/or.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/select-dbl.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/select-flt.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/shl.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/xor.ll
llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt
llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid.txt
llvm/trunk/test/MC/Disassembler/Mips/micromips32r6/valid.txt
llvm/trunk/test/MC/Disassembler/Mips/micromips64r6/valid.txt
llvm/trunk/test/MC/Mips/micromips-alu-instructions.s
llvm/trunk/test/MC/Mips/micromips/invalid.s
llvm/trunk/test/MC/Mips/micromips32r6/invalid.s
llvm/trunk/test/MC/Mips/micromips32r6/valid.s
llvm/trunk/test/MC/Mips/micromips64r6/invalid.s
llvm/trunk/test/MC/Mips/micromips64r6/valid.s
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