[llvm] r272666 - [mips] Optimize stack pointer adjustments.
Simon Dardis via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 14 06:39:43 PDT 2016
Author: sdardis
Date: Tue Jun 14 08:39:43 2016
New Revision: 272666
URL: http://llvm.org/viewvc/llvm-project?rev=272666&view=rev
Log:
[mips] Optimize stack pointer adjustments.
Instead of always using addu to adjust the stack pointer when the
size out is of the range of an addiu instruction, use subu so that
a smaller constant can be generated.
This can give savings of ~3 instructions whenever a function has a
a stack frame whose size is out of range of an addiu instruction.
This change may break some naive stack unwinders.
Partially resolves PR/26291.
Thanks to David Chisnall for reporting the issue.
Reviewers: dsanders, vkalintiris
Differential Review: http://reviews.llvm.org/D21321
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
llvm/trunk/test/CodeGen/Mips/eh-dwarf-cfa.ll
llvm/trunk/test/CodeGen/Mips/largeimm1.ll
llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp Tue Jun 14 08:39:43 2016
@@ -120,6 +120,10 @@ unsigned MipsABIInfo::GetPtrAddiuOp() co
return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu;
}
+unsigned MipsABIInfo::GetPtrSubuOp() const {
+ return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu;
+}
+
unsigned MipsABIInfo::GetPtrAndOp() const {
return ArePtrs64bit() ? Mips::AND64 : Mips::AND;
}
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h Tue Jun 14 08:39:43 2016
@@ -69,6 +69,7 @@ public:
unsigned GetZeroReg() const;
unsigned GetPtrAdduOp() const;
unsigned GetPtrAddiuOp() const;
+ unsigned GetPtrSubuOp() const;
unsigned GetPtrAndOp() const;
unsigned GetGPRMoveOp() const;
inline bool ArePtrs64bit() const { return IsN64(); }
Modified: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp Tue Jun 14 08:39:43 2016
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
@@ -440,17 +441,24 @@ void MipsSEInstrInfo::adjustStackPtr(uns
MachineBasicBlock::iterator I) const {
MipsABIInfo ABI = Subtarget.getABI();
DebugLoc DL;
- unsigned ADDu = ABI.GetPtrAdduOp();
unsigned ADDiu = ABI.GetPtrAddiuOp();
if (Amount == 0)
return;
- if (isInt<16>(Amount))// addi sp, sp, amount
+ if (isInt<16>(Amount)) {
+ // addi sp, sp, amount
BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
- else { // Expand immediate that doesn't fit in 16-bit.
+ } else {
+ // For numbers which are not 16bit integers we synthesize Amount inline
+ // then add or subtract it from sp.
+ unsigned Opc = ABI.GetPtrAdduOp();
+ if (Amount < 0) {
+ Opc = ABI.GetPtrSubuOp();
+ Amount = -Amount;
+ }
unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
- BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);
+ BuildMI(MBB, I, DL, get(Opc), SP).addReg(SP).addReg(Reg, RegState::Kill);
}
}
Modified: llvm/trunk/test/CodeGen/Mips/eh-dwarf-cfa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/eh-dwarf-cfa.ll?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/eh-dwarf-cfa.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/eh-dwarf-cfa.ll Tue Jun 14 08:39:43 2016
@@ -13,6 +13,8 @@ entry:
%0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
ret i8* %0
+; CHECK-LABEL: f1:
+
; CHECK: addiu $sp, $sp, -32
; CHECK: addiu $2, $sp, 32
}
@@ -24,10 +26,12 @@ entry:
%0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
ret i8* %0
+; CHECK-LABEL: f2:
+
; check stack size (65536 + 8)
-; CHECK: lui $[[R0:[a-z0-9]+]], 65535
-; CHECK: addiu $[[R0]], $[[R0]], -8
-; CHECK: addu $sp, $sp, $[[R0]]
+; CHECK: lui $[[R0:[a-z0-9]+]], 1
+; CHECK: addiu $[[R0]], $[[R0]], 8
+; CHECK: subu $sp, $sp, $[[R0]]
; check return value ($sp + stack size)
; CHECK: lui $[[R1:[a-z0-9]+]], 1
@@ -46,6 +50,8 @@ entry:
%add = add i32 %1, %3
ret i32 %add
+; CHECK-LABEL: f3:
+
; CHECK: addiu $sp, $sp, -40
; check return value ($fp + stack size + $fp)
@@ -60,6 +66,8 @@ entry:
%0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
ret i8* %0
+; CHECK-LABEL: f4:
+
; CHECK-MIPS64: daddiu $sp, $sp, -32
; CHECK-MIPS64: daddiu $2, $sp, 32
}
Modified: llvm/trunk/test/CodeGen/Mips/largeimm1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/largeimm1.ll?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/largeimm1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/largeimm1.ll Tue Jun 14 08:39:43 2016
@@ -1,13 +1,19 @@
; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s
-; CHECK: lui ${{[0-9]+}}, 49152
-; CHECK: lui ${{[0-9]+}}, 16384
define void @f() nounwind {
entry:
%a1 = alloca [1073741824 x i8], align 1
%arrayidx = getelementptr inbounds [1073741824 x i8], [1073741824 x i8]* %a1, i32 0, i32 1048676
call void @f2(i8* %arrayidx) nounwind
ret void
+; CHECK-LABEL: f:
+
+; CHECK: lui $[[R0:[a-z0-9]+]], 16384
+; CHECK: addiu $[[R1:[a-z0-9]+]], $[[R0]], 24
+; CHECK: subu $sp, $sp, $[[R1]]
+
+; CHECK: lui $[[R2:[a-z0-9]+]], 16384
+; CHECK: addu ${{[0-9]+}}, $sp, $[[R2]]
}
declare void @f2(i8*)
Modified: llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll?rev=272666&r1=272665&r2=272666&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/largeimmprinting.ll Tue Jun 14 08:39:43 2016
@@ -10,21 +10,19 @@
define void @f() nounwind {
entry:
-; 32: lui $[[R0:[0-9]+]], 65535
-; 32: addiu $[[R0]], $[[R0]], -24
-; 32: addu $sp, $sp, $[[R0]]
-; 32: lui $[[R1:[0-9]+]], 1
-; 32: addu $[[R1]], $sp, $[[R1]]
-; 32: sw $ra, 20($[[R1]])
-; 64: daddiu $[[R0:[0-9]+]], $zero, 1
-; 64: dsll $[[R0]], $[[R0]], 48
-; 64: daddiu $[[R0]], $[[R0]], -1
-; 64: dsll $[[R0]], $[[R0]], 16
-; 64: daddiu $[[R0]], $[[R0]], -32
-; 64: daddu $sp, $sp, $[[R0]]
-; 64: lui $[[R1:[0-9]+]], 1
-; 64: daddu $[[R1]], $sp, $[[R1]]
-; 64: sd $ra, 24($[[R1]])
+; 32: lui $[[R0:[0-9]+]], 1
+; 32: addiu $[[R0]], $[[R0]], 24
+; 32: subu $sp, $sp, $[[R0]]
+; 32: lui $[[R1:[0-9]+]], 1
+; 32: addu $[[R1]], $sp, $[[R1]]
+; 32: sw $ra, 20($[[R1]])
+
+; 64: lui $[[R0:[0-9]+]], 1
+; 64: daddiu $[[R0]], $[[R0]], 32
+; 64: dsubu $sp, $sp, $[[R0]]
+; 64: lui $[[R1:[0-9]+]], 1
+; 64: daddu $[[R1]], $sp, $[[R1]]
+; 64: sd $ra, 24($[[R1]])
%agg.tmp = alloca %struct.S1, align 1
%tmp = getelementptr inbounds %struct.S1, %struct.S1* %agg.tmp, i32 0, i32 0, i32 0
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