[llvm] r272647 - [mips][dsp] Fix use without def on DSPCtrl registers read by rddsp intrinsic.

[Daniel Sanders via llvm-commits]

Author: dsanders
Date: Tue Jun 14 04:29:46 2016
New Revision: 272647

URL: http://llvm.org/viewvc/llvm-project?rev=272647&view=rev
Log:
[mips][dsp] Fix use without def on DSPCtrl registers read by rddsp intrinsic.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D21063

Modified:
    llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/Mips/dsp-r1.ll

Modified: llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp?rev=272647&r1=272646&r2=272647&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEISelDAGToDAG.cpp Tue Jun 14 04:29:46 2016
@@ -47,7 +47,8 @@ void MipsSEDAGToDAGISel::addDSPCtrlRegOp
                                                MachineFunction &MF) {
   MachineInstrBuilder MIB(MF, &MI);
   unsigned Mask = MI.getOperand(1).getImm();
-  unsigned Flag = IsDef ? RegState::ImplicitDefine : RegState::Implicit;
+  unsigned Flag =
+      IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef;
 
   if (Mask & 1)
     MIB.addReg(Mips::DSPPos, Flag);

Modified: llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/dsp-r1.ll?rev=272647&r1=272646&r2=272647&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/dsp-r1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/dsp-r1.ll Tue Jun 14 04:29:46 2016
@@ -1,4 +1,5 @@
-; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+dsp < %s | FileCheck %s
+; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+dsp -verify-machineinstrs < %s | \
+; RUN:     FileCheck %s
 
 define i32 @test__builtin_mips_extr_w1(i32 %i0, i32, i64 %a0) nounwind {
 entry: