[llvm] r272646 - [mips][msa] copyPhysReg() should not set RegState::Define on result of CTCMSA.

[Daniel Sanders via llvm-commits]

Author: dsanders
Date: Tue Jun 14 04:11:33 2016
New Revision: 272646

URL: http://llvm.org/viewvc/llvm-project?rev=272646&view=rev
Log:
[mips][msa] copyPhysReg() should not set RegState::Define on result of CTCMSA.

Summary:
The machine verifier reports 'Explicit operand marked as def' when it is
manually specified even though it agrees with the operand info.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D21065

Modified:
    llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
    llvm/trunk/test/CodeGen/Mips/msa/elm_cxcmsa.ll

Modified: llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp?rev=272646&r1=272645&r2=272646&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEInstrInfo.cpp Tue Jun 14 04:11:33 2016
@@ -129,9 +129,12 @@ void MipsSEInstrInfo::copyPhysReg(Machin
         .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4)
         .addReg(DestReg, RegState::ImplicitDefine);
       return;
+    } else if (Mips::MSACtrlRegClass.contains(DestReg)) {
+      BuildMI(MBB, I, DL, get(Mips::CTCMSA))
+          .addReg(DestReg)
+          .addReg(SrcReg, getKillRegState(KillSrc));
+      return;
     }
-    else if (Mips::MSACtrlRegClass.contains(DestReg))
-      Opc = Mips::CTCMSA;
   }
   else if (Mips::FGR32RegClass.contains(DestReg, SrcReg))
     Opc = Mips::FMOV_S;

Modified: llvm/trunk/test/CodeGen/Mips/msa/elm_cxcmsa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/msa/elm_cxcmsa.ll?rev=272646&r1=272645&r2=272646&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/msa/elm_cxcmsa.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/msa/elm_cxcmsa.ll Tue Jun 14 04:11:33 2016
@@ -1,8 +1,8 @@
 ; Test the MSA ctcmsa and cfcmsa intrinsics (which are encoded with the ELM
 ; instruction format).
 
-; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
-; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
+; RUN: llc -march=mips -mattr=+msa,+fp64 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=mipsel -mattr=+msa,+fp64 -verify-machineinstrs < %s | FileCheck %s
 
 define i32 @msa_ir_cfcmsa_test() nounwind {
 entry: