[PATCH] D21294: ELF/AMDGPU: Add support for R_AMDGPU_ABS32 relocations

[Tom Stellard via llvm-commits]

tstellarAMD created this revision.
tstellarAMD added reviewers: rafael, ruiu.
tstellarAMD added a subscriber: llvm-commits.
Herald added a subscriber: kzhuravl.

http://reviews.llvm.org/D21294

Files:
  ELF/Target.cpp
  test/ELF/amdgpu-relocs.s

Index: test/ELF/amdgpu-relocs.s
===================================================================
--- /dev/null
+++ test/ELF/amdgpu-relocs.s
@@ -0,0 +1,37 @@
+# RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %s -o %t.o
+# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: llvm-readobj -r %t.so | FileCheck %s
+
+# REQUIRES: amdgpu
+
+# Make sure that the reloc for gdata is resolved by lld.
+
+  .text
+  .globl kernel0
+  .p2align 8
+  .type kernel0, at function
+  .amdgpu_hsa_kernel kernel0
+
+kernel0:
+  s_getpc_b64 s[0:1]
+  s_add_u32 s0, s0, gdata+4
+  s_addc_u32 s1, s1, 0
+  v_mov_b32_e32 v0, s0
+  v_mov_b32_e32 v1, s1
+  flat_load_dword v2, v[0:1]
+  s_load_dwordx2 s[0:1], s[4:5], 0x0
+  v_mov_b32 v0, s0
+  v_mov_b32 v1, s1
+  s_waitcnt lgkmcnt(0)
+  flat_store_dword v[0:1], v2
+  s_endpgm
+
+.Lfunc_end0:
+  .size kernel0, .Lfunc_end0-kernel0
+
+  .type   gdata, at object
+  .local  gdata
+  .comm   gdata,1024,4
+
+# CHECK: Relocations [
+# CHECK-NEXT: ]
Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -1430,17 +1430,18 @@
   write32le(Loc, NewInst);
 }
 
-// Implementing relocations for AMDGPU is low priority since most
-// programs don't use relocations now. Thus, this function is not
-// actually called (relocateOne is called for each relocation).
-// That's why the AMDGPU port works without implementing this function.
 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
                                    uint64_t Val) const {
-  llvm_unreachable("not implemented");
+  switch (Type) {
+  default: llvm_unreachable("do not know how to emit relocation");
+  case R_AMDGPU_REL32:
+    write32le(Loc, Val);
+    break;
+  }
 }
 
 RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
-  llvm_unreachable("not implemented");
+  return R_PC;
 }
 
 ARMTargetInfo::ARMTargetInfo() {


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