[PATCH] D21239: Enable index register memory constraints for inline ASM operands on SystemZ
Ulrich Weigand via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 13 04:22:54 PDT 2016
uweigand accepted this revision.
uweigand added a comment.
This revision is now accepted and ready to land.
There's a typo in the documentation change, see inline annotations. Otherwise, LGTM.
================
Comment at: docs/LangRef.rst:3598
@@ +3597,3 @@
+- ``S``: A memory address operand with a base address and a 20-bit immediate
+ unsigned displacement.
+- ``T``: A memory address operand with a base address, a 20-bit immediate
----------------
The 20-bit immediates are *signed*, not unsigned like the 12-bit ones.
================
Comment at: docs/LangRef.rst:3600
@@ -3597,1 +3599,3 @@
+- ``T``: A memory address operand with a base address, a 20-bit immediate
+ unsigned displacement, and an index register.
- ``r`` or ``d``: A 32, 64, or 128-bit integer register.
----------------
Likewise.
http://reviews.llvm.org/D21239
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